• RE: ADSP-SC587 adi_rom_boot() for Second Stage Load


    As this query is closed in the private support, post the final resolution for others to get benefit.

    Seems that you call the adi_rom_boot function from SHARC core 2. In that case, as mentioned in EE-384, "If the ROM API is invoked from the secondary…

  • RE: SC-58x dynamically loading SHARC from ARM


    From the "SHARC+ Dual Core DSP with ARM Cortex-A5 ADSP-SC582/SC583/SC584/SC587/SC589/ADSP-21583/21584/21587" document I can read the "mappings" for SHARC(s) L1 caches (table 6).

    As mentioned above we should be able to place SHARC…

  • RE: ADSP-21589 DMA SGU clocking config?


    It seems there is no ADSP-21589 DSP available in the anlaog device. Is this typo? If yes, please confirm which processor are you using?

    Still I can suggest you to have a look at Clock Related Operating Conditions section (PageNo:81 / 173) in the…

  • RE: openocd for ADSP-SC589 gives Error: session transport was not selected. Use 'transport select <transport>'


    For our product, we need linux kernel version 4.14.111 running on ADSP SC587/9 boards.

    Can you provide kernel patches for these boards and maintain it on kernel mainline. Its very important for us as it will speed-up our product development and We wont…

  • Comment on ADSP-SC58x/2158x SPDIF-RX feature list: What's new?


    We are planning to use the ADSP-SC587 chip for one of our new projects which includes the SPDIF input and output connection.

    We have one doubt regarding the SPDIF driving circuit given in the ADSP-SC589 EZ-Board schematics. Why the SPDIF coax…

  • Comment on Does the JTAG Reference EE-68 Apply to the Newer Processors?

    This post says the EE-68 document does not apply to the newer processors. Working on a design with SC587 now, and page 24 of its data sheet still references EE-68. The latest version on ADI's website of EE-68 is dated 2008, so it hasn't been updated…

  • is it ok to have a different frequency (other than 24MHz) at USB CLKIN pin at power up?


    In our application, at power up, the clock device will provide around 80MHz clock to USB CLKIN pin instead of 24MHz. 

    After power up, ADSP-SC587 will program the clock device to have 24MHz clock to provide to USB CLKIN pin. 

    so, is it safe to provide…

  • Can we interafce x8 DDR3 memories with DMC interface of ADSP-SC587?


    I have seen one statement saying "4-bit and 8-bit wide DDR2 DRAM memories are not supported" in DDR3 section. 

    This statement is confusing, as it is written in DDR exclusion feature section and talking regarding DDR2. Please clear this…

  • Comment on Highlights of MSI on ADSP-SC58x

    Hi we have some more doubts regarding the MMC Booting options of ADSP-SC587. Please do help us to get the required information.

    1.      How could we enable the MMC boot option ?

    2.     Does the MSI booting option is limited to Multimedia Cards only or can…

  • TRACE pod availablity for ADSP-SC785

    Hello Everyone, 

    We are using ADSP-SC587 processon in our design. 

    We have few query regarding TRACE interface provided in SC587 processor. These are - 

    1) Trace interface has 1 clock and 16 data lines, but in pin muxing - lower 8 data lines and clock…