Hi,
From the "SHARC+ Dual Core DSP with ARM Cortex-A5 ADSP-SC582/SC583/SC584/SC587/SC589/ADSP-21583/21584/21587" document I can read the "mappings" for SHARC(s) L1 caches (table 6).
As mentioned above we should be able to place SHARC…
Hello,It seems there is no ADSP-21589 DSP available in the anlaog device. Is this typo? If yes, please confirm which processor are you using?Still I can suggest you to have a look at Clock Related Operating Conditions section (PageNo:81 / 173) in the…
I lost my last week when to try to install u-boot on my sc583 ezkit board.
My board version 1.4A, BOM 2.4, Linux add in 1.3.0, cces 2.8.3.
U-boot wrote "Net: Phy 1 not found" because ethernet chip is DP83867IR - not that in docs and software!!!!!!…
This document explains how to create/modify the preload program for the custom target on ADSP-215XX.
The following topics are discussed:
Pre-load Files
Dynamic Memory Controllers (DMC) configuration
Default Preload and Initialization…
Hi Simon,Please find the example TWI code in the below Ezone link. This can be directly run on ADSP-21479 EZ-kit. I have configured ADSP-21479 as a master and another ADSP-21479 as a slave. Though this is for ADSP-21479, you can easily port it to ADSP…
Hello,
We understand that you have tried to port the application note project EE-383: MDMA-Based Dual-SHARC+ Parallel Pipeline Audio Talkthrough to ADSP-SC573.
In ADSP-SC589 EE-383 application, sequencing of events between the cores are controlled with…
ADSP-SC587 interfaced with ADSP-BF561 through SPORT in our custom board, issue is when we set clock frequency 1 MHz communication between the processor is fine. But when we increase the clock frequency, clock is getting deteriorated. Our requirement…