• Design Review BF607

    Hi ADI,

    would it be possible to review the attached schematic snippet to see if the flash memory is connected correctly to a BF607?

    It isn't possible to initialize the Flash with uboot after a UART boot.

    The system hangs when flash_init is invoked…

  • BF607 eth com failure using CCES1.1.0

    Ether test code was dreivated from ADSP-BF609_Evaluation_Board-Rel1.0.2 for:

    1) Silicon BF607, rev0.2; CCES 1.1.0

    2) result communication failure: can't enter EMAC ISR after dive into driver at debugging

    Please help troubleshoot and confirm.

  • BF607 L2 SRAM

    Hi,

    We are using ADSP-BF609 for one of our projects. The main intention in selecting this processor is the L2 SRAM and the ECC feature available with it. We want to use only Core 0 of the processor and the Core 1 will remain unused. We have a question…

  • Change BF609 to BF607 in project

    Hello All!

    I have a custom board with ADSP BF609/BF607. I use the example from lwIP inetd directory. I add some code and it works on BF609. But I have some boards with BF607. So I change in project settings the processor, alslo change in file app.ldf…

  • BF607 SMC Timing

    Hi,

    I'm confused about processor's signal AMSx (SMC chip select)

    I initialise processor (CLKIN = 32M) as

    <register-reset-definitions>

      <!-- Init clocks( CCLK = 496 Mhz, SCLK = 250Mhz, SCLK0 = 125Mhz -->

      <register name="CGU0_CLKOUTSEL…

  • BF607 SPORT initialization & TX/RX

    How to Initialize the SPORT by config the register on BF607

    I tried following, but it didn't work . I can't see anything on the oscilloscope.
    *pREG_SPORT0_CTL_A=0x820cf0f1;
    *pREG_SPORT0_DIV_A=0x180009;
    *pREG_SPORT0_TXPRI_A=0x85;
    Tks
  • BF607 ICE-1000 launch problem

    Hi there!

    We are having some troubles launching a debug session on BF607.

    After enabling hardware breakpoints in the last debugging session, the launch sequence gets always stuck at 40 %.

    Furthermore I am not able to disable the hardware breakpoints…

  • Enable cache on BF607 CoreB?

    Hi,

    Can anyone please provide me the example code of how to configure cache on BF607 CoreB? It is very urgent for one of my customer project. My custom hardware doesn't have external memory and only L2 memory has to be shared between CoreA and CoreB…

  • Can I use BF607 at 480MHz?

    Hi all

    One of my customers wants to use the BF607 at 480MHz.

    she prior used 25Mhz OSC to operate at 500Mhz.
    I would like to use 480Mhz with 30Mhz OSC in the current environment, but it seems that the clock can not be set.
    It is set to 450Mhz.

    Can I use…

  • BF607 SMC not working, why?

    I created simple project for Core0 were i configured PORTC PIN_14 as testing output for led and SMC Bank 0, Core1 not used.

    Firstly i noticed that generated ldf file has strange start address Bank 0: 0xBC000000 while in comments the start address should…