• Required IBIS model of ADSP-BF607

    As per verification, IBIS model downloaded from website is not working.

    Please provide IBIS model of ADSP-BF607.

  • RE: IBIS model is required for ADSP-BF607 Blackfin DSP

    Hi Urmi,

    We have IBIS model for ADSP-BF607. Please refer the IBIS model from below link.
    www.analog.com/.../ibis-models.html

    Regards,
    Anand Selvaraj.

  • Will ADSP-BF607 supports DDR2-800 WHICH WORKS AT 400MHz AT CYCLETIME OF 2.5ns?

                    Will ADSP-BF607 supports DDR2-800 WHICH WORKS AT 400MHz AT CYCLETIME OF 2.5ns?

  • Is the processror part number - ADSP-BF607 - support DDR2 With 2.5ns @ CL = 5 (DDR2-800)

    Dear All,

    Please let me know the maximum speed grade DDR can be supported by ADSP-BF607. Will this support DDR2- 800 speed grade.

    Thank you in advance.

    Thanks and Regards,

    Rohit

  • DualCore BF607 debug behaviour

    Hi !

    we work on a dualcore project which is divided in network stuff on CORE0 and audio stuff on core1

    the mysterious behaviour that we observed is that - if we reach a breakpoint in core1 (core0 runs in the meantime) the network connection ist lost on…

  • RE: Comparison between BF523 and BF607

    Hello,

    Please use the below parametric search link to compare the processors
    www.analog.com/.../11130

    Also, you can look into the the ADSP-BF607 & ADSP-BF523 documentations from below webpage,
    www.analog.com/.../adsp-bf523.html
    www.analog.com/.../adsp…

  • DDR2 connection BF607

    hi !

    I'm not sure if we need to use series damping terminators as shown in the ADSP-BF609 EvalBoard.

    We are very close to the DSP(BF607) - similar as shown in the eval board - and therefore I don't see the recommendation

    to use Rs(series resistors…

  • BF607 USB

    I am currently designing with BF607.  The USB function will not be used in my design.  Is it OK not to power the USB block (i.e. no supply to VDD_USB )?  Also, can I leave the unused USB I/O's floating?

  • RE: BF607 L2 SRAM

    Hi Pranav,

    Apologies for the delayed post. We are posting here for others to benefit.

    Yes, you can place your entire code in to L2 memory based on the memory.Please refer the simple example project attached.

    By default, functions in the 'Test.c' file mapped…

  • BF607 eth com failure using CCES1.1.0

    Ether test code was dreivated from ADSP-BF609_Evaluation_Board-Rel1.0.2 for:

    1) Silicon BF607, rev0.2; CCES 1.1.0

    2) result communication failure: can't enter EMAC ISR after dive into driver at debugging

    Please help troubleshoot and confirm.