Hello,i am using an ADSP-BF523 and an Elite SDRAM M12L64164A-5BIG2Y.The external busclock is 100MHz and the SDRAM-Timings are:*pEBIU_SDRRC = 0x612; *pEBIU_SDBCTL = EBCAW_8 | EBSZ_16 | EBE;*pEBIU_SDGCTL = PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_6 | CL_2 |…
I'm using the analogue output on the dScope to generate a 0dBu sinewave. This is being fed into one channel of the BF537 via the AD1854. I'm then using the simple C_Talkthrough_I2S.dpj to pass the encoded signal straight back into the DAC(AD1854…
Attached is rev 1.4 of the BF527 EZ-Kit manual.
You mentioned SCLK = 150Mhz, is that a typo or is it really 150? If its true, you are definitely over clocking the system (it can't be more than 133). Please refer to "Table 17. ADSP-BF523/ADSP-BF525/ADSP-BF527 Processors Maximum SCLK…
promblem: program burned into flash less than 1 sector can run after reset, but not when it larger than 1 sector.
environment: vdsp++5.0 update 8.
flash: M25P64 64M spi flash.
flash driver: D:\Program…
2009-08-11 21:08:39 Error: VCO selected is more than maximum value
Frank Van Hooft (CANADA)
We're starting work on our new BF523 board with the 2009R1 branch. In menuconfig:
Blackfin Processor Options -> Processor and Board Settings…
[#4576] BF527 0.2 silicon has different CPUID (DSPID) value
Submitted By: Bryan Wu
2008-10-30 03:27:20 Close Date
Closed Fixed In Release:
Found In Release:
2008-07-29 08:27:47 VCO_MULTI out of range
Miquel Soler i Mir (SPAIN)
I'm configurin the Clock setting for CORE_CLOCK and SCLK.
In my test I'm configurion the core clock at 325 MHz and SCLK to 130 MHz.
2009-11-23 06:21:57 Question on changing the core voltage and level.
V Hemanth Kumar (INDIA)
We are using an external voltage regulator for generating the core voltage to BF527. We can change the core voltage for the processor…
2009-09-26 14:52:05 Fault when enabling MMC support
We're bringing our BF523 board to life, and it's going quite well except for one wierd (to us) problem. When we enable MMC/SD card support in menuconfig…