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  • FAQ: Partitioning SDRAM on ADSP-BF561 and ADSP-BF609 in CCES

    carol.nelson
    carol.nelson

    Question

    The Startup Code/LDF settings in the System Configuration provide three options to partition SDRAM: "Custom", "Default", or "None". When selecting 'None' for the BF561/BF609 why do I receive this error?:

    …
    • 7 days ago
    • CrossCore Embedded Studio and Add-ins
    • Documents
  • On-chip flash for ADSP-BF538F and ADSP-BF539F

    GenevaCooper
    GenevaCooper

    Q 

    It is mentioned in the data sheet that we need to connect /AMS0 to /FCE to boot
    from on-chip flash.  What should be done with the /FRESET pin?

     

    A 

    Typical applications using the Spansion flash device externally would tie
    /FRESET to the system /RESET…

    • 26 days ago
    • Processors and DSP
    • Documents
  • ADSP-SC58x/ADSP-215xx SHARC+ Core Timer with Interrupt Example Code

    carol.nelson
    carol.nelson

    Here is an example code for Core timer with Interrupts on a SHARC+ Core in ADSP-SC58x/ADSP-215xx.

    Core_Timer_Enhanced_SHARC_Core_Core1.zip
    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • How many CRC blocks available on ADSP-SC58x/ADSP-2158x processor ?

    carol.nelson
    carol.nelson

    There are two CRC blocks CRC0/CRC1 present in ADSP-SC58x/ADSP-2158x processors. CRC0 is tied with MDMA0(8→9) stream and CRC1 is tied with MDMA1 (18→19) stream.

    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • How FFT accelertor on ADSP-SC58x/ADSP-2158x can be programmed?

    carol.nelson
    carol.nelson

    A software library containing support for using the FFTA is provided with the CrossCore Embedded Studio. Using this library, C or C++ programs running on an ARM Cortex A5 or SHARC ADSP-215xx and ADSP-SC5xx core can access the FFTA to implement various…

    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • differences between the ADSP-BF537 and the ADSP-BF533 booting process

    GenevaCooper
    GenevaCooper

    Q 

    What are the differences between the ADSP-BF537 and the ADSP-BF533 booting
    process?

     

    A 

    There are some differences as explained in EE-261 "ADSP-BF537 Blackfin
    Highlights for ADSP-BF533 Users". Excerpt from EE-261 Boot Rom section:

    "ADSP…

    • 26 days ago
    • Processors and DSP
    • Documents
  • How many DMC controllers are present in ADSP-SC58x/ADSP-2158x processors?

    carol.nelson
    carol.nelson

    There are maximum of 2 DMC controllers present on ADSP-SC58x/ADSP-2158x processors. For more details, refer to the processor data sheet.

    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • FIRA/IIRA Performance on ADSP-SC58x/2158x and ADSP-SC57x/2157x Processors

    carol.nelson
    carol.nelson

    FIRA Performance

    The FIRA processing mainly consists of the following stages:

    1. TCB load
    2. Coefficient load
    3. Delay line preload
    4. Compute
    5. Index write back

    FIRA runs at SCLK0 on ADSP-SC58x/2158x and ADSP-SC57x/2157x processors. FIR compute…

    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • Does MDMA support descriptor based DMAs on ADSP-SC58x/ADSP-2158x?

    carol.nelson
    carol.nelson

    Yes, like other peripheral DMA channels, MDMA also support descriptor based modes (descriptor array, descriptor list, descriptor on-demand etc.).

    • 15 days ago
    • ADSP-SC5xx/ADSP-215xx
    • Documents
  • What is the difference between ADSP-21371KSWZ-2A and ADSP-21371KSWZ-2B

    carol.nelson
    carol.nelson

    Q:

     

    The ADSP-21371 in commercial temperature grade has two part numbers, one with suffix -2A and another with suffix -2B.  What are the differences between the two parts?

    ---------

    A:

    On the ADSP-21371 there are no audio algorithms in ROM, just the coefficients…

    • 19 days ago
    • SHARC Processors
    • Documents
<>
 
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