• How to use sdram on sharc 21488.

    Because I have a large buffer need to put in sdram, so I have to open the macro define 'USE_SDRAM' in ADSP-21488.LDF file.

    However when I test the sdram memory, I cann't write correctly.

    The initPLL_SDRAM function is a copy of  demo program…

  • Bootloader Project for ADSP-21488


    We're using ADSP-21488 in one of our products. We wanted this processor to boot from the Flash. In our prototype board we connected the SPI lines as follows:

    DPI_P01 -> SPI0_MISO

    DPI_P02 -> SPI0_CLK

    DPI_P03 -> SPI0_MOSI

    We made sure…

  • RE: JTAG for ADSP-21488


    I would recommend posting your latest question as a new thread; it is not one that I can answer, and as this thread has been marked "answered" the question would be more visible if you start a new topic for this query.



  • RE: Matched-Phase Mode in 21489

    Hi Pierre,

    Yes, your understanding is correct. ASRC Matched-Phase Mode is only supported by ADSP-21488 processor and not by the ADSP-21489 processor. Both the processors are essentially identical apart from having more RAM and the SRC performance. Some…

  • Real-Time use of ASRC SoftwareModule

    Hi Folks

    Is there a real-time example of the ASRC library module AsynchSampleRateConverter-SH-Rel.2.0 SoftwareModule on an ADSP-21488?

    Many thanks

  • Simple program to test ADSP-21488

    Hello, could any one show example how to test my setup ?
    ( i made flash programmer, and development board,25MHz CLK, Boot config SPI_MASTER (01), and CLK konfig is 00)
    In loader setup, should i sue SPI_FLASH, or SPI_MASTER ?

    my program looks like this…

  • ADSP-21488 interface TWI/I2C


    I'm trying to interface my ADSP-21488 with a DAC chip via the Two-Wire Interface (I2C). I wanted to start easy and use the master mode transmit for writing certain registers in the DAC, which means addressing the chip correctly (with TWIM…

  • RE: Strange FLG2 behaviour


    As mentioned in the ADSP-214xx HRM, 'Table 24-14. Flag 3–2 Truth Table (SYSCTL Register)', the FLAG2 function on its pin is functional only if the MSEN, TMREXPEN and IRQ2EN bits are '0' in the  SYSCTL Register. So could you please…

  • RE: Re: ADSP-21489 1.1V and 3.3V switching regulator options

    OK that makes sense.

    I'm not sure why there has to be specific sequence because the data sheet for the ADSP-21488 says there is no specific order when it comes to the timing between the 3.3V and 1.1V supplies so long as there is nit more than 200mS timing…

  • VDSP++ and Silicon Errata of Sharc: 15000020

    Silicon Anomaly List of ADSP-21483/21486/21487/21488/21489 recommended two cases:

    CASE 1 - issue 1 and 2(a)

    CASE 2- issue 2(b)

    But examples of VDSP++ 5.0 with Update10 suggest another solution,

    What are workaround correct?