• Unlike in ADSP-214xx, you don't need to enable the FIR accelerator in PMCTL1 register explicitly in ADSP-SC58x/ADSP-2158x.

• Unlike as in ADSP-214xx, the byte address of the input/output/coefficient buffers should be converted in to word address…

Question

The Startup Code/LDF settings in the System Configuration provide three options to partition SDRAM: "Custom", "Default", or "None". When selecting 'None' for the BF561/BF609 why do I receive this error?:

Q 

It is mentioned in the data sheet that we need to connect /AMS0 to /FCE to boot
from on-chip flash.  What should be done with the /FRESET pin?

A 

Typical applications using the Spansion flash device externally would tie
/FRESET to the system /RESET…

Here is an example code for Core timer with Interrupts on a SHARC+ Core in ADSP-SC58x/ADSP-215xx.

Core_Timer_Enhanced_SHARC_Core_Core1.zip

There are two CRC blocks CRC0/CRC1 present in ADSP-SC58x/ADSP-2158x processors. CRC0 is tied with MDMA0(8→9) stream and CRC1 is tied with MDMA1 (18→19) stream.

A software library containing support for using the FFTA is provided with the CrossCore Embedded Studio. Using this library, C or C++ programs running on an ARM Cortex A5 or SHARC ADSP-215xx and ADSP-SC5xx core can access the FFTA to implement various…

Q 

What are the differences between the ADSP-BF537 and the ADSP-BF533 booting
process?

A 

There are some differences as explained in EE-261 "ADSP-BF537 Blackfin
Highlights for ADSP-BF533 Users". Excerpt from EE-261 Boot Rom section:

"ADSP…

There are maximum of 2 DMC controllers present on ADSP-SC58x/ADSP-2158x processors. For more details, refer to the processor data sheet.

Yes, like other peripheral DMA channels, MDMA also support descriptor based modes (descriptor array, descriptor list, descriptor on-demand etc.).

FIRA Performance

The FIRA processing mainly consists of the following stages:

1. TCB load
2. Coefficient load
3. Delay line preload
4. Compute
5. Index write back

FIRA runs at SCLK0 on ADSP-SC58x/2158x and ADSP-SC57x/2157x processors. FIR compute…