Hi
I am using Sharc ADSP-21487 and referring to the https://www.analog.com/media/en/dsp-documentation/processor-manuals/ADSP-214xx_hwr_rev1.1.pdf.
In this document, it seems ADSP-21487 can be configured to be ROM boot mode which means boot from internal…
Hi Sir,
We have customer inquiry will need to decode ATMOS ,currently , they already design ADSP-21487 to decode DTS / Dolby , but we are not sure can one ADSP-21487 can decode Dolby Atoms from compressed audio?
as description , I assume we need one ADSP…
Hello ADI Colleagues，
One of our customers would like to update their hardware with ADSP-21369 to replace ADSP-21363KBCZ-1AA. Do they need to modify their hardware and software?
Thanks & Best regards,
xiangzhi wu
Target initialization, including system reset, is performed as part of the Cortex-A55 OpenOCD target initialization for ADSP-SC598. If only the SHARC cores are being debugged in ADSP-SC598, a core reset is performed on each loaded core and no system reset…
What are the key differences between the ADSP-SC598 and ADSP-SC594 processors?
Hi all,
I'm pleased to announce that we have released a public beta of the 2.0 release of Yocto Linux for ADSP-SC5xx.
The beta release currently contains support for the following development boards:
Other boards will be added…
What are the differences between EMAC on ADSP-SC598 processor family as compared to ADSP-SC594 processor family?
Hi,
I am using ADSP-SC594. I want to receive audio data from 4 digital microphones using the PDM interface. I tried the following, but the desired SDATA output is not coming out.
Hardware connections are Clock - DAI1_05, Data0 - DAI1_07, Data1 - DAI1_08…
Dear sir,
Hello.
Could you tell me the mechanism and cause of Frame Sync Error of SPORTs?
And, What will happen, when Frame Sync Error is occurred?
customer want to know how to storage ADSP-BF547 in them Storage Room， please share storage guideline to us , many thanks.
