• Supported right development environment for ADSP-21161N

    Hello,

    I would like to clear that right development tools for ADSP-21161N

    CCES and ICE-2000(or ICE-1000) are supported for ADSP-21161N?

    At the CCES debug configuration wizard, I can choose ICE-2000 (or ICE-1000)

    But at the ADSP-21161N product page…

  • ADSP-21161N - generating a 40kHz signal

    Hello,

    Is it possible to generate 40 kHz sinus by using EZ KIT Lite ADSP-21161N ?

    I would like to get the signal on one of the rca outputs.

    If it is possible, can I use the configuration from example CTalkthru?

    regards,

    Piter

  • ADSP-21161N link port example C

    Hi, I'm new to DSP , I use  ADSP-21161N EZ-KIT Lite .

    I  have to read data from CMOS Digital Image Sensor . This camera have  clk_out and eight data_out ports, which i connected to linkport L0CLK  and  L0D[0:7] . L0ACK is not connected , camera don…

  • ADSP-21161N link port example C

    Hi, I'm new to DSP , I use  ADSP-21161N EZ-KIT Lite .

    I have to read data from CMOS Digital Image Sensor . This camera have clk_out and eight data_out ports, which i connected to linkport L0CLK and  L0D[0:7] . L0ACK is not connected , camera don't…

  • SIMD from external memory (ADSP-21161N)

    Hi all,

    Id like to run a FFT optimised for SIMD on a large amount of data in external SDRAM. I am using the ADSP-21161N processor and the reason why I am asking if its possible is because Ive read in both the compiler manual and the run time library…

  • ADSP-21161N, RD and WR signal and waitstate under Synchronous Read/Write as Bus Master

    Hi,

    When using Synchronous Read/Write as Bus Master, on ADSP-21161N, signal timing can be shown at Figure.19 on datasheet(Rev.C) page.31, as follows.

    Here, it shows WR and RD signals are changed triggered by CLKIN.

    On the other hand, when defining…

  • 21161N External Port DMA issue

    Hi,

    I am facing a problem with External port DMA operation in 21161N. Occasionally this functionality End of DMA interrupt is generated before we receive the required number of samples from the external device.  External device shows it transferred less…

  • x4 (96kHz) problem on SHARC 21161N Ez-Kite

    I changed the value of DAC_CONTROL1 to 0x002

    and ADC_CONTROL1 to 0x040

    both read_reg and write_reg

    when i just changed ADC value , no prob.

    but when changing DAC reg. i cant see nothing on osc.

    but i cant get the 48 kHz frequency

    i just wanted to…

  • How FFT accelerator (FFTA) on ADSP-SC58x/ADSP-2158x is different as compared to ADSP-214xx processors / What are the major features of FFTA on ADSP-SC58x/ADSP-2158x ?

    FFT Accelerator on ADSP-SC58x/ADSP-2158x is a completely new design as compared to the FFT accelerator on ADSP-214xx processors. The major differences/features of the FFT accelerator on ADSPSC58x/ADSP-2158x are:

    • Unlike in ADSP-214xx, the…
  • Porting software  from ADSP-21489 to ADSP-21573 and ADSP-SC573 

    Customer ask some questions.

    Right now we have  plenty of software for ADSP-21489, but it’s quite hard to port it to ADSP-SC573 family. Code itself

    is 99% C and C++.

     

    Does family ADSP-SC573 have interface with external static memory like AMI for ADSP…