• static IP config whit ADRV9364-Z7020

    Hello good day

    I have a question about the static IP config in ADRV6394-Z7020. For access to the Linux image to my board,
    Should I go into root mode? In this case, How do I do it?

    I know that the password is analog but How acces to this mode…
  • xo_correction with ADRV9364-Z7020

    I have adrv1crr-bob board with adrv9364-z7020. I want to use it for GPS reception.
    From what I understand for these applications it is better to use an external clock with greater precision. But in this case the board does not allow it…
  • clock in adrv9364-z7020+bob with NO-OS


    I have adrv9364-z7020 + bob board. I want to do a simple test without using Linux.

    I know that when I use Linux the clock that powers my system is a reference of 40 MHz, if I am not mistaken.

    When I do not use Linux, depending on the configuration…

  • ad9361-iiostream.c with adrv9364-z7020


    Is the ad9361-iiostrem.c example ready to run on the linux image of the ADRV9364-Z7020 + BOB board?

    If I want to edit this file, what do you recommend using? Any text editor like Linux emacs or some other IDE?

    I read that a cross-compilation must…

  • RE: eCPRI Support for adrv9364 SDR board

    Follow up question!
    With ADRV9364-7Z020, what are the tested data rates, since Zynq 7020 does not have any transceivers?
    Or can you highlight any documentation which can be referred for this?

  • RE: Custom devicetree in Petalinux build for ADRV9364-Z7020

    Dear Nuno,

    I apologize for the delay. I have been trying to follow both approaches (extending and creating a new one) to no success. This has prompted me to wonder how necessary it is to actually rebuild the kernel with the modifications I've done to…

  • Can I get source file of ADRV9364-Z7020 schematics?


    As for ADRV9364-Z7020 schematics, I can download the PDF version. How can I get the latest source file D or D1 verstion? 

    The PCB is source file now.



  • ADRV9364 DAC_DMA_EXAMPLE's RF output is very low


    I am using ADRV9364z7020 with vivado 2019.1 and HDL_2019_R2 + No-OS-2019_R2 . I am able to build both hdl and no-os projects. I am working on example projects.  When I use DAC_DMA_EXAMPLE project, I can change frequency and all the other things…

  • RE: HDL Reference design for ADRV9364-Z7020+FMC

    Hi Nicole,

    CLK_IN is connected to pin 63 of JX4.



  • Sanity Check for FMC and ADRV9364-Z7020

    Hello Everyone, I am a rookie to the world of SDR. I have few doubts

    1.Is there any way to monitor the voltages and Currents on ADRV1CRR-FMC+ADRV9364-Z7020?

    2.I read that there is ADM1166,which deals with power sequencing. I just want to know the purpose…