• Clock and reset in adrv9361-z7035


    I want to test my simple counter design on the adrv9361-z7035 board FPGA without using the reference design they give me.
    In this case I want to use a clock signal and a reset signal. But I can not understand which is the pin that I should relate…
  • Pin reading from adrv9361-Z7035 HDL design in bash script

    I want to read a pin from HDL design in the bash script given below in order to make a decision. Guide me  about the procedure:

    cd /sys/bus/iio/devices/iio\:device1/
    for i in {1..8..1}
    echo $((650000000 + $i * 100000000)) > out_altvoltage1_TX_LO_fr…

  • Synchronize Rx and Tx Fast Lock profile ADRV9361-z7035

    Dear ,

    I implemented different signal processing block within Reference design . I am facing a issue. Let me elaborate following

    1- Rx Profile 0 : RF BW 56 MHz , LO 2428 MHz

        Rx Profile 1 : RF BW 56 MHz , L0  2484 MHz

    The above are the settings of ADRV9361…

  • ADRV9361 OS linux AD IIO Oscilloscope problem


    Hope you are doing well.

    I have design of ADRV9361 2019_R1 and i was boot my image file of 2019_R1 and when i was using the defaults files like boot.bin ,zynq.elf etc and insert SD card in my boot and power it working find TX side and also doing…

  • RE: Regarding NO-OS in ADRV9361-Z7035

    We officially support no-OS with xilinx vitis 2020.1 or 2020.2, just install Vitis and follow the build instructions for your project.

  • capture and read memory in adrv9361-z7035+fmc with no-OS project


    After seeing answers in this forum I came to the following conclusion to capture data from rx in memory and then read it, but I still have doubts.

    I initialize the rx_adc structure:

    axi_adc_init(&ad9361_phy->rx_adc, &rx_adc_init);


  • RE: change ref clk in adrv9361-z7035

    ok - I tested the entire process here:

    1. Modified the dts source file
    2. Rebuild the dtb
    3. Copied to the SD card 

    michael@mhenneri-D06:~/devel/hdl/github-linux-build/linux$ git diff
    diff --git a/arch/arm/boot/dts/zynq-adrv9361-z7035.dtsi b/arch/arm/boot/dts…

  • Vivado version for adrv9361-z7035


    I have the dv9361-z7035 board, 
    I know that with the latest version of the linux image I have to obtain the Vivado 2019.1 license. Which of these versions of vivado should I use? -Vived HL Design Edition -Vived HL System Edition Thanks a lot!…
  • Generation Sweep from 4.4GHz to 4.9GHz using ADRV9361-z7035

    Dear All, 

    I want to generate a linear frequency sweep from 4.4GHz to 4.9GHz. What is the best option/method to follow.

    I have experience of working on the above mentioned board . One option is to use 8x Fast lock profile but 8x profile are not sufficient…

  • linux image version for adrv9361-z7035

    Since I cannot get the latest version of the Linux image to work for my ADRV9361-Z7035 + FMC board, 
    I am going to use the 2019_R1 image. Can using an outdated image cause problems in customizing my project? Either to use Linux, Matlab, or Vivado…