• RE: Porting USRP E320 design to ADRV9361-z7035

    There are no plans to support E320. NI should have a reference design for the device.


  • RE: ADRV9361-Z7035 LO Frequency Error

    Are you using ADI eval board or custom board? 

    As mentioned above, if you are using crystal oscillator for the REF_clk source, then you can use the internal DCXO tuning to compensate for this drift.

  • adrv9361 ADC problem


    hope you are doing well.

    i am using ADRV9361 and didn't recvd any value.

  • RE: ADRV9361-Z7035 revision F2 and PCB changes: incompatible with previous revisions



    Maybe you can use an FMC extender to fit revision F2 of adrv9361-z7035. Web example.


  • Kuiper Linux not working With HDL Reference Design in ADRV9361-z7035

    I m running HDL Reference design branch 2019_r2 on ADRV9361-z7035 board 


    for OS i m using Kuiper Linux 


    I have successfully run HDL reference design on vivado with ADRV9361…

  • customize ADRV9361-Z7035


    I am customizing my adrv9361-z7035 + fmc board and I wanted to know

    What is the difference between doing my board configuration with ad9361 non-Os API or with AD9361 ParamInit?

    Thank you,


  • ADRV9361-ZC7035 Maximum DMAC throughput?

    According to the wiki the maximum throughput is 1066Mbps (not 1066MT/s), which would mean at a sample rate of 61.44MSps (max sample rate), DMA has absolutely no chance of streaming real-time.

    Is this correct? Or is the DDR3 actually 1066MT/s and thus have…

  • Multiple ADRV9361 synchronization

    Hello. We are discussing the idea of using multiple ADRV9361's to perform a multi-channel waveform processing. We are wondering if it's possible (and what would be involved) to synchronize multiple ADRV9361's to get them to be completely coherent with…

  • ADRV9361-Z7035 Hardware Validation Testing


    I am looking at the reference design for the ADRV9361-Z7035 and wanted to know if you also provided any post-manufacturing hardware validation tests along with the build package?

    Also, would other XILINX chips such as the Z7030 or z7045 be a drop…

  • RE: Frequency Hopping Example Design with ADRV9361-z7035 and ADRV1CRR-BOB

    I selected LOs frequencies as I did for adrv1crr-fmc reference design ( that is RF Bandwidth 50 MHz , Profile 1 2425MHz, Profile 2 2475MHz , dwell sample value 15000).

    The above settings work correctly with Adrv9361-z7035+adrv1crr-fmc but not working…