• LO Leakage in ADRV9361-Z7035 Board

    Hi All,

    Currently we are working on a few which is related to Telecommunication where to configure the Registers of AD9361 we are currently using Gnu radio 3.8 by setting the LO  Frequency and other required settings for our application but it is…

  • Zynq ADRV9361 custom DMA timing "jitter"

    Hi everyone,

    As I explained in a previous post I am trying to use the regular output AXI DMA DAC block with a few mods. My application requires various pulse patterns as modulation, much like an arbitrary waveform generator by Tektronix or whatever. Number…

  • ADRV9361-Z7035 License

    Hi,

    I was wondering if Analog Devices provides some sort of single use license for the Vivado software package that allows users to program the Z7035 on the ADRV9361-Z7035 board? Or do we need to purchase the full license through Vivado? Thanks! 

    Best…

  • Porting Zynq ADRV9361 to recent U-Boot

    I've set up a project based on the ADI U-Boot, but need to move to a newer version. It doesn't look like much was changed in ADI's fork:

    git diff --name-only github/analogdevices/master xilinx-v2018.2x-v2018.2
arch/arm/dts/Makefile
arch/arm…

  • RE: ADRV9361-Z7035 SoM no-OS Example

    Thank you. I installed Vivado 2019.1 and SDK and now I am able to compile the driver. But when I am testing the driver with the ad9361 project available in git, I am getting the following error

    cf-ad9361-lpc: Successfully initialized (122879028 Hz)
    SAMPL…

  • RE: ADRV9361-z7035 FPGA Vivado Linux Toolchain General Question

    Can you create a separate thread with the connections you have made and ideally a timing diagram showing your signaling and the jitter experienced.

    -Travis

  • defconfig for ADRV9361-Z7035 ADRV1CRR-FMC

    I see numerous references to zynq_xcomm_adv7511_defconfig, but the following are the only configs that enable CONFIG_AD9361 on master:

    arch/arm/configs/zynq_pluto_defconfig
    arch/arm/configs/zynq_e310_defconfig
    arch/arm/configs/zynq_sidekiqz2_defconfig

  • RE: ADRV9361 transceiver ADC Problem

    Hi alishan

  • Dynamic partial reconfiguration using ADRV9361-Z7035 + ADRV1CRR-FMC

    Hello,

    We are trying to implement the dynamic partial reconfiguration processes on ADRV9361-Z7035 + ADRV1CRR-FMC board, we don't know exactly how to build the block design of this system on VIVADO 2021.2 that makes it possible to transmit and receive I…

  • ADRV9361-Z7035 airflow

    Hi ADI Apps,

    my customer is using the ADRV9361-Z7035 SOM in an application that is for critical infrastructure & wants to be sure that he is cooling the device appropriately. 

    The AD9361 datasheet claims a maximum junction temperature of 110C, and…