• ADRV9026 Dual Band support?


    Please check whether the following specifications are supported by dividing 2T2R by ADRV9026.
    1. FDD
    2. 2T2R Frequency 900Mhz, BW 20Mhz
    3. 2T2R Frequency 2100Mhz BW 30Mhz

    Thank you

  • ADRV9026

    hi adi:

          I would like to ask about the problem of ADRV9026 evaluation board: I found that the configuration register issued by the software is inconsistent with the register officially given by ADI. May I ask whether THE ADDRESS decoding is done by…

  • Regarding Transceiver Evaluation board ADRV9026

    We have few questions as per below.

    1) Can we directly use Transceiver Evaluation board ADRV9026 without ADS9-V2EBZ ?

    2) Can we directly use this transceiver ADRV9026 with PC/Laptop instead of ADS9-V2EBZ ?

    3) Can we control maximun output power of transmiter…


    What is the permittivity (dielectric constant) of the EVALUATION BOARD of the ADRV9026?

    In the System Development User Guide Document it is stated that dielectric of the PCB is Isola I-Speed, but permittivity is not stated.

    Since Isola I-speed family…

  • ADRV9026 SW integration


    Our integration plan is to have the SW integration environment be within a Petalinux / MPSoC platform (acting as the baseband processor itself).

    The GPIO and SPI would be modified within adi_platofrm.h. However I see no static libraries or object…


    Hello Ez team,

    I have a ADRV9026-Eval and it does not work. After debugging, I realized that the power board named ADP5056_PWR_BOARD on the ADRV9026-Eval does not work as desired. 

    When I searched ADP5056_PWR_BOARD, I could not found anywhere to find and…

  • ADRV9026 Tx data format

    In ADRV9026 user manual there is a explanation about RX path data format which is GAIN COMPENSATION, FLOATING POINT FORMATTER AND SLICER.

    But i cannot found Tx path data format. What is the Tx data format? Is it fixed point 12/16/24bit or floating point…

  • ADRV9026 HDL Reference Design

    Hi ADI team,

    Right now, there is no hdl reference design generated for ADRV9026 in hdl repo of ADI's github site (link). I wonder when will you add a project for ADRV9026 and which fpga boards will be supported?

    I appreciate if you provide information…

  • ADRV9026 SPI test

    Hi ADI Team,

    We have a query regarding the ADRV9026 board.

    Could you clarify whether the DEVCLK is mandatory for ADRV9026 input for the SPI communication used for initial device configuring.

    The understanding is for initial SPI communication DEVCLK is…

  • ADRV9026 RSSI


    How can i retrieve the RSSI value in dBFS from the API? 
    The ADRV9026 datasheet says there is 4 independant RSSI monitor for the 4 RX channels, but i can't find more informations about this.