Search - EngineerZone

RE: Adrv9008-1, problem with axi_dmac_transfer (infinite loop)

andrei_g

Hi Dendy,

The axi_dmac core has only on interrupt request output signal, basically, if you setup the DMA an interrupt will be generated, according to your setup regarding the transfer status.

The problem is the JESD link remaining in CGS. CGS means no valid…
- 4 months ago
- Microcontroller no-OS Drivers
- Q&A
ADRV9008-1 gain index reversed in AGC mode

dhantz

I am having some issues with AGC mode on the ADRV9008-1. In particular it is with the operation of the gain index. Using the evaluation board, another engineer able to test AGC mode and see it operate according to UG1295. However, in our in-house design…
- Answered
- 24 days ago
- TES GUI & Software support ADRV9009/ADRV9008-1/ADRV9008-2
- Q&A
ADRV9008-1 SYSREF and SYNCIN Termination

charrsen

Hi,

The following is from the ADRV9008-1 datasheet:

Is this programmable as enabled or disabled or is this always enabled? (I can't find anything that would allow me to program this as on or off.)

Thanks.
- 5 months ago
- Design Support ADRV9008-1/ADRV9008-2/ADRV9009
- Q&A
Adding ADRV9008-1 and ADRV9008-2 on a single image and configuring these using Linux

Dheeru@3

Hello ADI Team

Thanks for the support provided for configuring ADRV9008-1 and ADRV9008-2 using Baremetal. The solutions offered in https://ez.analog.com/fpga/f/q-a/551024/adrv9009-zcu102-hdl-for-2-lanes were of great help.

Now I am trying to configure these…
- 8 months ago
- Linux Software Drivers
- Q&A
Integrating ADRV9008-1 and ADRV9008-2 drivers on same image

Dheeru@3

Hello

I am using ZCU102 evaluation board and I have successfully integrated the drivers of ADRV9009, ADRV9008-1 and ADRV9008-2 separately by following the steps provided in https://wiki.analog.com/resources/eval/user-guides/adrv9002/quickstart/zynqmp.…
- Answered
- over 1 year ago
- Linux Software Drivers
- Q&A
RE: ADRV9008-1 configuration

PVALAVAN

gabi.furman said:
SPI sequence of messages to change frequency. They want to avoid using the Talise function for this specific operation

Configuring ADRV9008-1 using SPI codes is not supported by ADI as it is more prone to error and difficult to debug…
- 11 months ago
- Design Support ADRV9008-1/ADRV9008-2/ADRV9009
- Q&A
Integrating drivers of ADRV9008-1 and ADRV9008-2 on the same image

Dheeru@3

Hello

I am using ZCU102 evaluation board and I have successfully integrated the drivers of ADRV9009, ADRV9008-1 and ADRV9008-2 separately by following the steps provided in https://wiki.analog.com/resources/eval/user-guides/adrv9002/quickstart/zynqmp.…
- over 1 year ago
- FPGA Reference Designs
- Q&A
Reduce frequency change time (ADRV9008-1)

JehoLee

Hi,

I'm using ADRV9008-1 + my custom board.

I developed an application using a IIO driver to change the LO frequency of ADRV9008-1.

Refer to the iio_attr program.(https://github.com/analogdevicesinc/libiio/blob/master/tests/iio_attr.c)

Since the…
- Answered
- 11 months ago
- Linux Software Drivers
- Q&A
RE: ADRV9008-1, problem with receiving data from the ADC when porting HDL design adrv9009 to MicroBlaze KCU105

AdrianC

I think this is a duplication of:

Adrv9008-1, problem with axi_dmac_transfer (infinite loop) - Q&A - Microcontroller no-OS Drivers - EngineerZone (analog.com)

The discussion should continue there.
- 2 months ago
- FPGA Reference Designs
- Q&A
RE: ADRV9008-1 / ADRV9008-2_RF_EXT_LO_IO and Independent frequency using

PVALAVAN

doolpung said:
- Should this port always be used? If this is not used, should the internal RF LO SYNTHESIZER be used?

If the internal RF LO Synthesizer is not able to meet phase noise requirment, then user can opt for EXT_LO.

By default internal LO is…
- over 1 year ago
- Design Support ADRV9008-1/ADRV9008-2/ADRV9009
- Q&A