• RE: Adding ADRV9008-1 and ADRV9008-2 on the same image

    Hello Michael

    Thanks for the response.

    I have built images for ADRV9008-1 and ADRV9008-2 independently. Now, our design requirement is such that both ADRV9008-1 and ADRV9008-1 should be housed on the same board. Right now ZCU102 is used as the evaluation…

  • ADRV9009 and ADRV9008-1 pinout compatibility


    is it possible to use an ADRV9009 on a pcb designed for the ADRV9008-1?

    From the data sheets, it seems this is supported, e.g. the 9009 TX Out pins are DNC and ORX in pins are grounded, on the other hand the SERDIN pins would all be hard pulled up…

  • Loading custom profile for ADRV9008-2 and ADRV9008-1

    Hello ADI Team

    I am trying to configure ADRV9008-1 and ADRV9008-2 using Linux. I followed the steps that were provided in https://wiki.analog.com/resources/eval/user-guides/adrv9002/quickstart/zynqmp  and created images for ADRV9008-1 and ADRV9008-2.


    Hello Adrian!!!

    Thanks so much for all the guidance regarding HDL. Also i would like to thank buha for helping in getting no-os project with code segregation between ADRV9008-1 and ADRV9008-2. This was really helpful while doing no-os for both ADC and…

  • ADRV9008-1 - How to eliminate unwanted signal near main Carrier ?

    We use ADRV9008-1 in our board. Our fundamental modulated waveform frequency is in C-Band frequency and is 5700MHz. Our sample rate is 122.88 MHz, and the maximum bandwith is our design is about 30 MHz. The problem is that if there is an another signal…

  • adrv9008-1, problem with axi_dmac_transfer

    There is ADRV9008-1, hdl (latest version, like NO-os) built on the basis of the AD9371 project on KCU105 in order to assemble the ADRV9009 project on MicroBlaze. NO-os is based on ADRV9009. Used by Vivado 2020.2.
    The project is working, ADRV9008…

  • RE: Adrv9008-1, problem with axi_dmac_transfer (infinite loop)

    Hi Dendy,

    The axi_dmac core has only on interrupt request output signal, basically, if you setup the DMA an interrupt will be generated, according to your setup regarding the transfer status.

    The problem is the JESD link remaining in CGS. CGS means no valid…

  • ADRV9008-1 SYSREF and SYNCIN Termination


    The following is from the ADRV9008-1 datasheet:

    Is this programmable as enabled or disabled or is this always enabled? (I can't find anything that would allow me to program this as on or off.)


  • Adding ADRV9008-1 and ADRV9008-2 on a single image and configuring these using Linux

    Hello ADI Team

    Thanks for the support provided for configuring ADRV9008-1 and ADRV9008-2 using Baremetal. The solutions offered in https://ez.analog.com/fpga/f/q-a/551024/adrv9009-zcu102-hdl-for-2-lanes were of great help.

    Now I am trying to configure these…

  • Integrating ADRV9008-1 and ADRV9008-2 drivers on same image


    I am using ZCU102 evaluation board and I have successfully integrated the drivers of ADRV9009, ADRV9008-1 and ADRV9008-2 separately by following the steps provided in https://wiki.analog.com/resources/eval/user-guides/adrv9002/quickstart/zynqmp.…