In our design, we are using a single ADP1763 to power a RF TRx IC. A 10uF is placed at the output of ADP1763.
The evaluation board of the RF TRx IC suggests a number of parallel caps to be added at the individual power pins of the TRx IC. Effectively…
Hello,
I would like to use the ADP1763 for a design and I need some clarification regarding the choice of the output capacitor.
The datasheet recommands to use a 10 µF capacitance with an ESR of 500 mOhms or less to ensure the stability.
The output…
ADP1763 is a Offical used ldo. I want know the actual power accuracy ripple range. What is the judgment basis of these channel‘s voltage?
Hello everyone,
I am using EVAL-AD9695 Module for my application.
I need some clarification for the following observations to start my customized board design.
1. As per ADC AD9695 datasheet, Recommended Range of following ADC Supplies are,
AVDD1, AVDD1_SR…
Hi Arthur,
Paralleling 8 should be fine as long as you follow design considerations when paralleling.
For paralleling multiple ADP176x, please refer to this guide discussing the different considerations in configuring LDOs in parallel. The sample LDO…
1. According the data sheet ,the SIX PINS(A4, A5, A10, A11, B4, B11) belong to the Analog Power Supply for the Clock Domain.
What is the role of the beads and resistors in this circuit in the demo board?
2.According the Table 47 in the data sheet ,the…
Typical peak currents are as below.
| Current (A) | PIN | (V) | Typ Peak current(A) |
| VDDA_1P3_BB | E5 | 1.3 | 0.635 |
| VDDA_1P3_CLK_LDO | N1 | 1.3 | 0.172 |
| VDDA_1P3_RX_RF | B1 | 1.3 | 0.058 |
| VDDA_1P3_AUX_VCO_LDO | C10 | 1.3 | 0.154 |
| VDDA_1P3_CLK_SYNTH | G5 | 1.3 | 0.003 |
| VDDA_1P3_… |
Hi!
I have ADP1763ACPZ0.95-R7.
Vin=1,3 V
Expected Vout=0.95, but we have 1,86 V
Can you help me?
Hi Ben,
1. The PG pin is an open drain connection. If not used, leaving it open is just ok but tying it to GND is better.
2. Figure 25 of ADP1761, ADP1763 is correct. Please refer to that. Equations 1 and 2 are applicable above a certain Css (Css > 10nF…
Hi Michael,
For your design, you could refer to this application note which discussed the different considerations in configuring LDOs in parallel. Also, it used ADP1763 as an example which should be helpful on your design. It will also be good if you…
