• AD9361 + ADP1755

    Hi,

    AD9361 1.3V range in 1.267V ~ 1.33V, tolerance only 2.5%.

    If use ADP1755 to design,

    Looks like all of tolerances depends on external resistor, ADP1755 ADJ has no any tolerances, right?


       
     

     


       
     
     
     
     
     
     
     
     
     
     
     






     
     
     
     
     
     
     
     
     
     





  • AD9361 + ADP1755

    Hi,

    AD9361 datasheet 有標明1.3V range 應該在1.267V~1.33V, tolerance 大概2.5%左右~~

    假設參考ADI 建議的 ADP1755~~

    就datasheet 所描述, 是否所有誤差的產生都在外部電阻, ADP1755 本身的ADJ output沒有任何誤差???

     

    另外, power 文件有提到, 除了ADP1755 LDO 之外, 也可使用switching 的方式~~例如ADP5040~~

    但AD5040的誤差更大, 應該無法達到AD9361的標準…

  • adp1755 低温纹波导致9364杂散

    我使用adp1755给9364供电,用lt4644生成的3.3v给adp1755供电,低温下9364出现了明显的杂散。原因是什么?如何解决?

  • RE: ADP1755 Thermal parameters

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • ADP1755 output voltage drift

    Hi all, 

    I use ADP1755 to generate the 1.3 V for AD9364. 

    Based on the ad_fmcomms3_reva schematic, I design the AD1755 circuit to convert 2.5V to 1.3V as the following.

    PS: D1V5 means 2.5 V source voltage.  

    For the larger board, everything works correctly…

  • RE: ADP1755+AD9364电源问题

    请问ADP1755输出1.3V是使用固定输出版本还是可调输出版本?

    另外,ADP1755输入电压是多少伏?是否稳定?

    有没有原理图方便贴上来看看吗?

  • RE: ADP2164 and ADP2164-1.8

    We are using ADP2164   1.8V  fixed voltage regulator. (R105 = DNP  and  R65 = 0ohm)

    The same for the ADP1755 (fixed 1.3V regulator) R25=DNP and R66=0ohm.

  • ADP1755 Operating Temp Limit Question

    For the ADP1755, page 5 of the datasheet (absolute maximum table) gives a “Junction temperature range” of -40C to +125C, then a “Junction temperature” of +150C.  Is the former the operating temperature limit?

  • ADP1754/ADP1755 - SS pin unconnected

    I found Vout image for internal soft start on datasheet.

    Can I leave the SS pin open ?

  • Phase Noise when using external ref @80Mhz

    If I  using external reference clock @80Mhz and the clock phase noise meet the requirement at UG-570 P15, and I use the ADP1755 LDO to supply V1.3 . And set AD9361 LO to 5.5GHz. How many Phase Noise @1Khz I will get? -90dBm?or batter?