• ADP150 Pulse Load Voltage Drop

    I have the following LDO circuit with an equivalent DC and Pulse load.

    With switch S1 closed the output at VDD shows >10mV of voltage drop during the pulse load .

    The VDD output shows very little voltage drop with S1 open - see waveforms below.

    Ho…

  • OTP Supply Voltage / ADP150 Ldo

    Hi,

    In a design, we originally had ADP150ACBZ-2.6R7 for the OTP supply voltage. This output voltage seems (currently) a bit hard to find so changed to 2.75V since we already used ADP150ACBZ-2.75R7 in our design.

    Anyway, from the BF52x datasheet…

  • RE: Programming the ADF4351

    If using the Analog Devices hardware then either the Cypress USB or SDP-S connector is required. The evaluation board uses the Cypress device, and is also fitted with the ADP150.

  • adp150输出噪声问题

    我详细地看一下ADP150的datasheet,根据噪声频谱图计算出来的噪声和手册给出的不太对。

    手册给出10-100kHZ的噪声是9uV,但我根据下图计算红色框内的噪声就已经超出9uV了。

    [0.03*0.03*(100K-10)]^0.5=9.48uV

     

    两者值相差较大不知道是我计算方法有问题还是手册标注有问题。

  • Why were these selected? (1)

    Why were these selected?

     

    ADP150 delivers 150 mA and very low noise to the PLL & VCO. ADP3334 delivers
    500 mA (required by the modulator) and is sufficient for good modulator
    performance.
  • Why were these selected?

    Why were these selected?

     

    ADP150 delivers 150 mA and very low noise to the PLL & VCO. ADP3334 delivers
    500 mA (required by the modulator) and is sufficient for good modulator
    performance.
  • LDO enable level and leakage current

    Does an LDO (ADP150 or ADP160) consume any significant additional quiescent/leakage current due to the enable pin that is driven high at a voltage level lower than VIN? Example: VIN=4V; EN=3V

  • 使用ADP150驱动白光led

    请问使用ADP150芯片datasheet所给的典型电路能否驱动白光led(led的驱动输入为:3.0~3.2V  20mA)

  • Recommended regulators for ADI PLLs and VCOs

    PLL Recommended regulator
    Low power standalone PLLs and the ADF4360-x narrowband PLL/VCO family (< 100 mA); e.g. ADF41xx, ADF42xx, ADF4360-x

    Use the ADP150 regulator; good performance, low cost.

    Use…

  • RE: 鉴相频率的杂散与环路滤波器的布线问题

    您好!

    通常鉴相频率杂散和芯片性能和布板布线有关。对于电源和ADF4360性能,请参考附件中电路笔记。对于射频布板,建议将器件都放置到板子的一面。