i got a system picking up data at a more or less constant bit rate of 10Mbit/s. As recovery unit i thought about working with the ADN2816 which offers the desired rate.
At https://ez.analog.com/message/163320#163320 i found some answers…
I'm trying to interface an LVDS input data stream to the ADN2816.
Previously I was using capacitors in the line but found they were picking up quite a bit of noise when the data stream was off which was producing unwanted data and clock outputs.
Our customer is confused about the Input / Output Voltage, Singe-End or Differential.
"QUANTIZER—DC CHARACTERISTICSPeak-to-Peak Differential Input PIN − NIN 0.2(min) 2.0(max) V"
Here is, I understand this spec is the Differential…
I have a question about Acquisition Time of ADN2816.(normal mode, 10Mb input)
I can see the "Acquitision Time", it is 40msec, in the table-1 of datasheet.But it's a typical value only.I'd like to know maximum time of acquisition…
ADI does not have an IBIS model specifically for the ADN2816, I was told the model for the ADN2813 might suffice
I am wanting to use an ADN2816 clock and data recovery chip as the clock source for an ADC. I need 0.4 ps jitter. The ADN2816 makes great play of using a dual PLL architecture and filter to achieve very low jitter generation and good jitter attenuation…
What is the max/min/typical latency between the DataIn and DataOut Signal? Is it depending on any settings?
What is the max/min/typical latency of ADN 2816 between the DataIn and DataOut Signal? Is it depending on any settings?