• RE: ADAU1452 code download

    Hello, Dave

     

    Thank you for your quickly response!

     

    We find the root cause about this issue(hardware design issue):

     

    Root cause:

         The MCU control the ADM811 pin 3(MR), and the ADM811 pin 2(Reset) connct to the ADAU1452 reset pin.

    When we pull high…

  • RE: I have designed the ADAU1702 into an engineering breadboard, using the MINIB eval board as the basis. I've replicated the circuitry as exactly as possible, but cannot get communications working with SigmaStudio via the ADUSB2Z adaptor board... ye...

         Hello,

         It may not matter, but I did notice a difference in reset circuits for the two boards.  The 1701MINIZ board processes the /RESET from the USBi through the ADM811 (into pin 3 and out pin 2):

         Your prototype board directly parallels the ADM811…

  • ADM811 input hysteresis and glitch immunity

    what's the typical input hysteresis and glitch immunity of ADM811?

  • RE: ADM809T testing question

    Hi Kevin,

    As the threshold of the devices are all tested during production test, it’s unlikely an issue with the device.

    I would advise the customer to check the grounding of the scope, try measure ADM811’s VCC and RESET by referencing the scope ground…

  • ADM811 resistive divide usage

    Hi

    ADM811 is very low consumption current device.

    Can ADM811 use resistive divided input?

    I would like to spend 1mA for resistor.

    (input voltage is 24V, 100uA enough?)

    ADI has more suitable device, I know.

    Sorry I could not select other device.

  • [征文] IN118的基准源用AD的芯片,上面写着D6B,困饶我很久了 AD5312


    这个芯片(AD9833)的名字我猜的,可忽略看,如果是这个芯片,左看右看也不知是干吗呢?

  • ADI芯片辨识、型号查找

    看看截图:

  • Output Voltage of RESET pin of ADM811LARTZ

    Hello support people,

    I have a question about the output level of ADM811L RESET pin.

    In the page-3 of ADM811 datasheet(Rev.G), spesification of minimum level of "high" output is wirtten as "Vcc x 1.5".

    According to this, if I use…

  • RE: ADAU1467 Please let me know the correct timing in the system initialization sequence.

    Hello takumi3952,

    This is shown in the Figure 14 diagram. Basically, until the power has come up and stabilized and the internal level shifters start functioning, then the master clock is allow to reach the PLL. At that point the state of the reset pin…

  • RE: 1452 ASRC noise

    Hi Dave,

    this is not a solution for the first lock after powering up the ADAU.

    There is no problem with the mute function (mute ASRC when lock is lost) if at least one lock is done!

    After this you can plug-in/out the toslink without any pop noise.…