Are there any plans to release an LTSpice simulation model for the ADM1272? If so, is there any timeline for it?
Hi ADI expert
May I have your help to provide ESD level of ADM1272?
it seems we can't found this information from datasheet.
thank you in advance
Since ADM1272 have the power cycle function. And I have found OC fault,CML,nonebove when doing power cycle.
So I would like to have a question about this.
Does ADI has any suggestion about how long the system needs to be turned on and ready…
Where can I find a VHDL or verilog model of ADM1272 ?
We saw the description of peak power in the ADM1272 datasheet. (0XDA)
I can understand that Peak Power comes from voltage and current, but there are still a few questions that need your assistance.
1. What time period is this based on? Does…
Hi ADI Expert
I have seen the following description in the ADM1272 datasheet: Does this mean that the GPIO1/2 can be used to get an adjustable restart time function?
The restart function can also be triggered from a PMBus command. In all cases, the restart…
Dear ADI Expert,
My customer designed the ADM1272 circuit according to ADM1272-DESIGN-GUIDE-GENERAL-181015.pdf. Just place a similar RC network on the EFAULT pin in the picture below.
The ADM1272_Workbook tool needs the bottom resistor(R18).
I would like to understand the method used to set the RC Network for EFAULT & ESTART Pins of ADM1272 . It's not clear to me from the datasheet . I really appreciate any help , Thanks in advance
My customer has 2 questions about the ADM1272 short circuit and EFAULT level and behavior.
1. ADM1272 not only detects Vsense when the output is short-circuited but also detects VDS, right? How much VDS voltage will be judged as output…
May I know if there is a spec for the delay time when the enable pin is detected low to gate start sinking current to shut the external Mosfet off?