• RE: Question about EVAL-ADL5569 board

    Hi,

    I moved your query to RF and Microwave community.
    Someone else here should be able to assist you.

    Thanks!

  • ADL5569 OP1dB

    Hi, Looking at the datasheet for ADL5569, the Output P1dB is quite high for my application and was wondering if I can reduce the supply voltage to decrease the OP1dB while maintaining the RF bandwidth of the device?

  • ADL5569 evaluation condition

    Hi all,

    Please advice to evaluate the ADL5569.

    Specifications and Typical Performance Characteristics are following condition to measure the data.

    "parameters specified for differential input and differential output"

    What is the test conditions…

  • ADL5569 power gain

    Hello, 

    I am using the ADL5569 op amp to an ADC and am currently doing a line up analysis of the system.  I want to use the single -ended input configuration determine the power gain of the system.  The datasheet lists the voltage gain only.  Using the s…

  • ADL5569 single-ended input

    I saw “ADL5569 evaluation condition”.

    https://ez.analog.com/rf/f/q-a/115442/adl5569-evaluation-condition


    My customer wants to evaluate the ADL5596 with a single-ended input.
    The note in the figure states that R4 should be 25Ω for a single-ended…

  • ADL5569 Single ended output

    Trying to use the ADL5569 here with differential input and single ended output. Is it ok to do so? are there any recommendations when doing so? Is just terminating one leg to 50ohm ok?

    thanks

  • Can you connect both Amps in ADL5569 together ?

    Hi,

    Can we combine both Amps in ADL5569 together to improve slew rate, settling time while driving large Capacitive load (20pF), in switched fashion (for example while driving a sampling network of Gsps ADC directly) ? Will it hurt stability or degrade…

  • ADL5569 S-par and Match

    What is the correct way to utilize the ADL5569 Sparameters? Why is there not more LC match between the ADC driver amps and ADCs - the ref circuits utilize resistance match that throws away gain.

    I downloaded a ADL5569 Spar file into Genesys - it is a…

  • question about fig 52 in ADL5569

    Hi

    Hi,

    Fig 52 in ADL5569 looks like the solution I’ve been searching for. What I understand is that this circuit tries to solve the problem of DC coupling between the driver and the ADC.  I understand too that the resistive divider at Vcom input…

  • ADL5569 maximum PDB / PDB2 current when driven low

    Hello.

    Could Analog let me know what the maximum current out of PDB/PDB2 is when the PDB/PDB2 pin is driven to 0V?

    The datasheet states a typical value of -70uA, but does not give a worst case.

    I would like to calculate the largest series resistance I…