• RE: ADG3300 Oscillation Problem

    Hi, May

    My answer is as follows.

    I have only 2 probe. So, I can measure only 2 point at the same time. 

    • channel 1: at the FPGA output and the ADG3300 input A. 
      • I can not measure FPGA output. But FPGA output and the ADG3300 input A are shorted.
  • adg3300

    I'm trying to use the ADG3300 to simply translate between a 3.3V and a 5V system .    Originally I had planned to

    use the auto-sense capability for bidirectional signals,but have decided the part is way too unstable for that to ever work.

    Is it possible…

  • ADG3300内部是如何识别转换方向的?


  • RE: A suitable interface device for AD7762

    Hi Moto,

           I found an 8 channel bi directional level translator that I hope you can use for the interface on your application. Please check on the ADG3300. ( please refer to link ADG3300 datasheet). You may also want to do a parametric search on other…

  • RE: ADG3300 input interfacing


    While the "Input Driving Requirements" section of the ADG3300 datasheet is correct, the ADG3308 "Input Driving Requirements" section describes the input drive requirements for the ADG330x family better. Below is what it states:…

  • Oscillations when using the ADG3300 level translator

    Hi all,

    I am using the ADG3300 level translator to interface an FPGA output (3.3V signal , 1MHz frequency) to an IC working at 1.8V. I get severe oscillations of 50 MHz at the output. I have used all the good PCB practices like good decoupling , ground…

  • ADG3300/3308 Minimum pulse width

    Dear Expert,

    I checked the level-shift ADG3300/3308 datasheet, which can't showed any information of Minimum Pulse Width /Pulse duration specification, Can you help? Thanks you!

  • ADG3300: Can I work with VCCA = VCCY?

    For proper operation the datasheet says: VCCA must always be less than VCCY but
    inside the data sheet,
    on the Power Requirementssection, it is described that VCCA can be equal to
    VCCY. You have a contradiction in your datasheet. Can I…
  • RE: AD7124-8 SPI level shift using ADG3300

    Hi, Steve.

    Apologies. This was missed. Don't worry about not having a pull up resistor. SPI do not require this as this interface uses push pull circuit. However, if you want a known state upon power up /CS pin is pulled to IOVDD (100kohm is fine…

  • RE: AD9042S的数字供电为5V,能不能与3.3V的FPGA直接相连?