Hello everyone,

ADG1434 datasheet shows that ADG1434    Fully specified at ±15 V/+12 V/±5 V

Can ADG1434 be powered by ± 6V?

Thank you

Hello,

just wanted to ask if the ADG1434 switch is based on the AEC-Q qualification standard?


Thanks in advance
Mohammad

Hello everyone,what the use of RLand CL? RL means return loss ?  what the mean of CL?  thank you ,looking forward your answer!

I am thinking of using the ADG1434 with a VDD of +24 and VSS connected to GND.  This appears to be a valid configuration because the data sheet lists VDD to GND as a maximum of 25V, but I am nervous because 24V is pretty close to the maximum.  Also, the…

I'm operating an ADG1434 at a relatively slow pace (~40 kHz) to produce an RC shaped square wave. I am curious about how the output of the switch should behave once the S and D pins are nearly the same voltage. I have attached an image of the basic setup…

Hello,

I need to switch different signals to an ADC. I already choose the AD7195 for my application.

In the application I need to multiplex a differential input of the ADC (channel AIN1 and AIN2).

I want to use a CMOS switch for that.

Another point…

Background of Application:

We have 4 independent analog signal lines that range from -12V to 12V coming from an external device.

Configuration of ADG1434:

Source Terminals A : Input analog signals from external device

Source Terminals B : Gro…

Hello,

I am using the ADG1434 quad switch and we are having what appear to be ESD failures. Using a curve tracer, we can see 20-25uA @ 0.5V between pin 1 and VSS on two different failed parts. We have one more failed part that is closer to a dead short…

Hi , 

Could you please let me know if  ADG5434 & ADG1434  EPAD is connected to  VSS  internally .

We see that it seems not to be connected internally .

ADG1434: Exposed Pad. The exposed pad is tied to the substrate, VSS . 

ADG5434:The exposed pad is connected…