• ADF5901 RF output not stable

    Hi,

    We have developed a 24 GHz custom radar board with the ADF4159-ADF5901-ADF5904 setup. We program the Tx to generate 24Ghz and divide it by 4 to send it to PLL feedback in RF synthesis mode (no ramp). Once the initialization is done for both Tx and…

  • RE: ADF5901 programming issue

    Hi ggall 

    We figured out the issue. We were getting 2.1V on VREG pin. When we had a closer look at the board and schematic, we saw that the VREG was connected to 220pF cap instead of 220nF cap. We replaced the cap and the got VREG to be 1.87V. After making…

  • ADF5901 configuration

    I've attached a picture of my ADF5901 configuration.

    I'll appreciate it if you could approve.

    My Ref freq is 25MHz and the output frequency is between 24GHz to 24.25GHz

    Should I set Register 8 to 250?

    I was not sure if I should set it to 250 or…

  • ADF5901

    Hello,
    I want to know if I can can get the Gerbers for your EV-ADF5901SD2Z eval board?Also could you please tell me what substrate you used for the  EV-ADF5901SD2Z evaluation board?  

    Best Regards.

  • ADF5901 output power issue.

    Hello,

    I'm using ADF5901 with ADF4159. 

    i want to use txout 1 for 5dBm, txout 2 for 8dBm.

    how can i control each output power ?

  • ADF5901+ADF4159

    Hello,

    I am using the ADF5901+ADF4159 chip combination to generate an FMCW ramp from 24GHz to 24.25GHz. However, the voltage on the VTUNE pin is always zero. I've been debugging the chips to figure out the problem. I have some questions in this context…

  • ADF5901

    Do you have any closed loop phase noise data on the ADF5901/ADF4159?

    integer-N locked to a 100 MHz crystal oscillator.

  • ADF5901 temperature measurement

    Hi,
    I've configured the ADF5901 to use the internal temperature sensor to take temperature measurements and it seems to work.
    I'm interested in taking the ADF5901 temperature periodically.
    My questions are:
    1. Can I keep the counters enabled…
  • ADF5901 Programming

    Hello,

    Looking at page 23 of the ADF5901 datasheet (specifically the initialization sequence) on certain steps, see steps 15, 17, and 19 in image below, there is a time in parentheses.  Is this a delay to wait before writing that specific register?

  • ADF5901 R7?

    in the page 22 of the datasheet of the adf5901,Clock Divider
    Bits[DB23:DB12] set a divider for the VCO frequency calibration.
    Load the divider such that the time base is 10 μs.

    my question is :i do not understand''load the divider such that the time base…