• ADF5610 EVB Setting....

    Could anyone clarify and give me any advice?

    Part : ADL5610
    Ref. Freq : 50MHz
    Output Freq : 10GHz

    According to U/G, ADF5610 EVB was tested.
    However, the result came out at 9.84 GHz. (Fig. 1)
    I don't know which one is the problem.
    We derive the same result…

  • program EVAL-ADF5610 EEPROM


    Recently, I am design a  synthesizer  with ADF5610,and I wanna to use ADF5610 Evaluation software to control my board.

    I refer to the EVAL-ADF5610  Demo Board Schematic, put a EEPROM 24LC32 on my board.  

    I have a SDP-S board but cannot connect to my…


    Do we have any LINUX driver available for ADF5610?

  • RE: ADF5610 datasheet


    Yes this is a typo in the datasheet. It should say Bit 0 which is VT_SEL. Thanks for the feedback.




    Thanks in advance.

    we are trying to write the VCO BUIT IN TEST functionality for ADF5610 in Linux driver and not able to get any reference source code. 

    Also we have searched datasheet and many other places for this case, but not able to get the exact…

  • ADF5610 Fractional Operation A

    Hi FAE,

    We use the ADF5610 to generate 10GHz signal, the integer mode output is normal, but the fractional mode output is spurious. For example, the spurious is generated at 10.00001GHzs, as shown in the figure, how can this spurious be reduced? thanks.

  • ADF5610 Divider Noise Floor


    What is the noise floor of the divider used in the ADF5610?

    I do not see any phase noise plots in the datasheet with the divider enabled. I also do not see the divider noise floor defined in the specifications table.

    I know there will be a 20*log…

  • RE: calibration of ADF5610


    During autocalibration the following steps take place:

    1. For desired RFOut, the subbands are searched to determine the subbands that contain the RFOut frequency. 

    2. Since subbands contain overlapping frequencies, RFOut may be within 2 consecutive…

  • ADF5610 Modes of operation

    Good day, I am programming my second PLL device and I am kind of struggling getting into the right mode of operation in the ADF5610 evaluation board. I have used the ADF5610 Evaluation board software, so now I am trying to communicate with the evaluation…

  • ADF5610 Settling time.

    The ADF5610 datasheet said :For settling time requirements faster than 50 μs, contact Analog Devices, Inc., applications support. Settling times under 50 μs are possible, but certain limitations on performance may exist.

    I will use ADF5610 for 5GHz…