• RE: ADF5355 phase noise

    Hi,

    You can check ADF5610 and ADF4372. All three parts have models in ADISIMPLL, you can simulate and compare their performance for given reference frequency and loop filter.

    Regards,

    Kudret

  • ADF5355

    Hello,

    Do you have data for the output return loss of the RFoutB pin on the ADF5355 over frequency?  Do you have S-params for the RFoutB?

    Thanks.

  • ADF5355

    用ADF5355做了一个3.9GHz的点频，50MHz鉴相，最终出来后发现，主谱旁边50MHz及其N次谐波非常差，更换环路滤波器后无效果，求解答？

  • adf5355

    Hello,

    I have tried to use ADF5355 as RF PLL integrated VCO chip.

    When I test chip with board, The output has some spur...

    There is my PLL setting

    I didn't use REF EVAL board. so I used USB to serial Port and ARM chip (coretex M4)

    First, I…

  • ADF5355 Problem

    Hello,

    I have a ADF5355 board.

    When power on (no commands sent yet) the LD and the MUX out are both 3.3V ("1").

    When sending commands to the board, it all seems fine on the controller side (attiny13a) but nothing changes , no output.

    no change…

  • Controlling ADF5355

     I am new to this area, would really appreciate help on my queries. We are trying to do some EMI studies for which we are using this IC as a signal source. 

    1. If i dont want to use the eval board for ADF5355, how do i control(program) our custom designed…

  • ADF5355

    Dear Sir/Madam

    When the ADF5355 CE is low , whether or not the ADF5355 could power up through software configuration.
    Thanks.

  • ADF5355

    Hello,

    ADF5355 - any updates for Simpll?  especially regarding spurs calc in fractional mode...

    Output power for frequencies from 50MHz to 1GHz?

    Simpll missing output doubler...

    Anyway to decrease settling time in integer mode beside increasing phase…

  • adf5355

    We working on ADF5355.

    We are unable to lock the PLL to required frequency.

    We are using refernce clodk of 10MHz.

    Our frequency of operation is 3.3GHz which is derived by using divider.

    We would like to use pll in sweep mode in steps 100KHz in fractional…

  • ADF5355 Lock Time

    Hi,

    Currently my lock time is close to 8.5ms (ADIsimPLL reports 6.1ms for my loop filter config). I would like to improve this and expecting to bring it down. 

    ADF5355 datasheet mentions that "Much faster lock times than those detailed in this data sheet…