• ADF5002

    What is maximum DC input range of the ADF5002? The device has internal 3pF AC coupling and 50 ohm termination to ground.

  • ADF5002

    I deviated from the recommended configuration (some on purpose and some by neglect) and so I'd like your advice.

    1. The part is shown powered from ground to +3.3V, I powered it from -3.3V to ground exchanging all pins as expected (RF inputs/outputs…

  • How to protect ADF5002?

    I have an ADF5002 evaluation board whose output is fed to the RF port of a mixer, with the IF connected to a filter followed by an amplifier. Recently the ADF5002 just quit working. We are attempting to replace it, but I'm worried as to why it happened…

  • ADF5002 duty cycle?

    Hello,

    I want to use ADF5002 prescaler as the AD9912 clock input.

    Could anyone please tell me about ADF5002 duty cycle?

    Best regards.

  • About ADF5002 power consumption

    Hell

    I want you to tell us about how to obtain the power consumption of the ADF5002.

    I've seen figure.4 datasheet. However, I had no idea.

    I want to know how to obtain the power consumption at a specific frequency .

    thanks

  • ADF5002 output impedance

    The data sheet for the ADF5002 shows an output structure with two 100 ohm internal pull ups.

    I assume that there are open collectors or open drains connected to these.

    The general description then states that the ADF5002 has 100 ohm differential outputs…

  • ADF5000, ADF5001, or ADF5002 sensitivity vs. temperature?

    The data sheets for these parts show very good behavior for sensitivity vs. Vdd, as shown on figure 3.

    Do you have data for typical sensitivity vs. temperature for any of these parts, especially the ADF5000?

    Thank you.

  • RE: ADF5000 stable with no RF applied?

    yes like with most RF dividers, the input stage will self-oscillate with no RF present.

    The only way to overcome this is to use the hardware powerdown pin (CE) .

    The self-oscillation frequency for the ADF5000 is ~ 10GHz. This halves for

    every extra…

  • RE: 工程师百问百答——高速电路设计之频率合成和时钟产生

    ADI产品及应用

    混频器的本振能否用AD9517

    也可以的,但是一般用ADF41xx系列的PLL芯片。


    DDS输出的是正弦波,怎么可以作为FPGA的时钟呢?这不是矛盾吗?

    也可以输出方波的DDS,例如AD9834AD9833AD9837AD9838。


    有什么好的介绍控制DDS杂散的应用笔记可以推荐一下吗?

    AN-927讲解了杂散来源,以及如何判断杂散原因,如何排除,请点击《确定杂散来源是DDS/DAC还是其他器件(例如开关电源)http://www.analog.com…

  • TAGS LIST: RF and Microwave

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