• RE: Fractional PLL selection, ADF41513SD2Z vs ADF41513SD3Z vs ADF4372

    Thank you very much for this answer. We received the ADF4372 eval board a few days ago and we are happy with the performances.

  • RE: ADF4372 Lock Detect

    Then the datasheet has some errata.

    Table 5 on page 10 for pin 41 of the ADF4372 datasgeet, listing MUXOUT functions, lists analog lock detect as one of the options.

    Figure 32 on page 19 of the ADF4372 datasheet shows analog lock detect as one of the…

  • Autocalibration ADF4372

    Hello Kudret

    I read the value of 89 MHz when autocalibration is on and the ADF4372 returns me these values:  Core: C; Subband: 11; Bias:11 at  temp: 63.5degree centigrade

    after this, I turn off autocalibration and set this value and I can lock the ADF4372…

  • ADF4372 frequency sweep

    Hi

    I am FAE in Japanese distributor.

    My customer looks for PLL from 15G to 16GHz  to use for FMCW.

    Can ADF4372 be swept by connecting DDS modulation output to ADF4372 REFin?

    If ADF4372 can not be swept, could you introduce another solution?

    Best regards

    N.K…

  • ADF4372 initialize sequence

    Hi 

    I am FAE in Japanese distributor.

    ADF4372 datasheet about the initialize sequence step2 mentions to write to each register in reverse order from 0x7C to Address 0x10.

    But our customer finds EV-ADF4372SD2Z with ACE increments from 0x02 to 0x73.

    Should…

  • RE: ADF4372 ADDRESS ASCENSION bit

    Hi,

    Bit description is the correct one. 0 for descending and 1 for ascending. 

    Kudret

  • ADF4372+ADMV1018 cascaded performance

    Hi gentleman,

    As I don't have the the two EVBs and bench, could you please help to check the gain flat and MxN spur performance with below test conditions, thanks.

    Condition:

    RF: 26G to 29G

    IF: 3.2G to 4GHz

    LO: 11.4G to 12.5G

    ADMV1018 working at 2xLO…

  • AUTOCALIBRATION BYPASS ADF4372

    Hi

    I Want to use ADF4372 in autocalibration bypass mode with a lock time of less than 30us.

    I have two questions.

    1.  In the application note AN-2005. I read a sentence in this application that " Generate a new table for every chip because each chip…

  • About ADF4372

    Hello,

        I am doing a test of a demo board of ADF4372, my schematic is refer to the evaluation board datasheet. But the SPI still seems not work. I have write Reg0x0=0x18, Reg0x1=0x0, Reg0x20=0x14 for 4-wire SPI, but the muxout still could not read back…

  • About ADF4372

    Hello,

           I am testing a test board of ADF4372 recently.There seems to be some problem:  1. The input current of  AVDD (3.3V) port is just about 70 ma,and after I turn on the VCC_VCO ( 5V),it raise to 100ma, while its still 90ma lower than the typical value…