• ADF4372失锁

    本人使用ADF4372生成时钟时,发现pll始终无法锁定,测试muxout后发现r分频输出50MHz时钟时,N分频输出约49.2MHz,请问大神们这是否正常?如何解决。本人电路如下  图所示

  • ADF4372 Fs/2 and 3Fs/2 Clock Spurious

    Hello ADI Team,

    I am using ADF4372 PLL for generating Output Clock with frequency 12.288 GHz in Doubler path (RF16).

    PLL Settings:

    Reference input frequency is 409.6 MHz.

    PFD frequency = 307.2 MHz

    VCO Frequecny = 6.144GHz

    PLL Output Observation:

    I observed…

  • ADF4372- Differential CLKOUT Pin connection-Reg

    Hi everyone,

    I am planning to use ADF4372 for giving Sampling Clock input of 12.6GHz to DAC AD9174.

    But I could not find the following details in datasheet.

    1. Differential output voltage VODIFF(min & max)

    2. Common mode output voltage VOCM (min &…

  • RE: Fractional PLL selection, ADF41513SD2Z vs ADF41513SD3Z vs ADF4372

    Thank you very much for this answer. We received the ADF4372 eval board a few days ago and we are happy with the performances.

  • RE: ADF4372 Lock Detect

    Then the datasheet has some errata.

    Table 5 on page 10 for pin 41 of the ADF4372 datasgeet, listing MUXOUT functions, lists analog lock detect as one of the options.

    Figure 32 on page 19 of the ADF4372 datasheet shows analog lock detect as one of the…

  • Autocalibration ADF4372

    Hello Kudret

    I read the value of 89 MHz when autocalibration is on and the ADF4372 returns me these values:  Core: C; Subband: 11; Bias:11 at  temp: 63.5degree centigrade

    after this, I turn off autocalibration and set this value and I can lock the ADF4372…

  • ADF4372 frequency sweep

    Hi

    I am FAE in Japanese distributor.

    My customer looks for PLL from 15G to 16GHz  to use for FMCW.

    Can ADF4372 be swept by connecting DDS modulation output to ADF4372 REFin?

    If ADF4372 can not be swept, could you introduce another solution?

    Best regards

    N.K…

  • RE: ADF4372 ADDRESS ASCENSION bit

    Hi,

    Bit description is the correct one. 0 for descending and 1 for ascending. 

    Kudret

  • ADF4372 initialize sequence

    Hi 

    I am FAE in Japanese distributor.

    ADF4372 datasheet about the initialize sequence step2 mentions to write to each register in reverse order from 0x7C to Address 0x10.

    But our customer finds EV-ADF4372SD2Z with ACE increments from 0x02 to 0x73.

    Should…