Hi,

Can Vtune voltage vary with different populations of ADF4360-2 for the same circuit board?

We have a Modulated RF signal from the DAC (AD9705BCPZ) that feeds into Vtune along with the Charge Pump (CP) Output.

Typically the Modulation shift of the…

Hi,

I have received a question at ADF4360-2 from the customer that, "By using devide-by-2 option for 2GHz VCO output, does it result to output 1GHz of 50% duty ?"

He said he is now having external discrete components of 1/2 dividing for VCO…

專家您好,

Use ADF4360-2,

The Oscillator is 20MHz input and 2GHz clock output.

請問該設定那些register?? 值又是多少??

Thanks.

Hi,

We plan to use ADF4360-2 to supply a 1GHz LO to ADL5380 in a direct Rx converion architecture.

I would appreciate it if you provide me with the following information:

a. typ/wc harmonics contect for Rf/2 option

b. Which is the differential RF…

Hi,

Our application is DVB-C modulator,

The chip set adopted includes ADF4360-2, ADCLK-914 and AD9789.

We have a problem of bad RF quality for QAM-128 and QAM-256.

It looks fine when the constellation is QAM-64.

The situation is getting worse once…

Hi,

I would like to use ADF4360-2.

So, I have a question.

Please help me.

Question：

I am experimenting with the ADF4360-2 evaluation board.

Looking at the evaluation results, we found that the output power fluctuated significantly with temperature.
The…

Hi,

We are using ADF4360-2 for production design, but we found a few device can not be locked well when OFF/ON its power supply.

We found changing value of Cn (=10uF which is recommended in datasheet) into 4.7uF can improve the issue and properly start…

Hi , 

Could you please let me know with regards to the following.

1. Datasheet describes REF_IN min:0.7Vp-p and max: AVDD , could you please let me know what is the recommended values in terms of Spurious.

2. With regards to the Reference input section…

The ADF4360-2 integrated PLL/VCO has a decoupling node (Cn, on pin 14) which is decoupled with a large value capacitor.

In the datasheet this is variously described as a 10uF (for best phase noise) and 440nF (a compromise between phase noise and turn…

Dear sirs,

We've been experiencing a PLL unlocking issue at temperatures close to +82C.

Application info as follows:

   Output freq: 2012MHz

   PFD Freq=2MHz, Ref freq=28MHz

   Presc=16/17

   Band Sel div=8

   Icore=15mA, Ibuff=11mA

   R Reg : 340039

   Ctrl…