• ADF4193, ADF4196 evaluation boards software

    The latest ADF4193 and ADF4196 software (v6) is attached.

    Installation process:

    1. Disconnect any evaluation board

    2. Download and run the attached installer

    3. Click Next/Continue/Finish when asked

    4. Connect your evaluation board

    5. Windows will…

  • RE: PLL / Synthesizer with very short Lock Time

    Thanks a lot dear Paul FormerMember for the 'to-the-point' note.

    Now I see that fast chips like the ADF4196 can achieve wonderful results. But can it give me the VCO freeze (or holdover as it is called by Analog Devices) function? Is there some…

  • RE: 签个到,送您好礼啦!(获奖名单已公布)

    西安,长安区凤栖东路,射频微波和数模混合电路,关注AD9739、ADF41020、ADF4159、ADF4196、AD9914

  • RE: PLL and evaluation selection

    How about UG-160: http://www.analog.com/static/imported-files/user_guides/UG-160.pdf

    It is for the EV-ADF4108EB1Z evaluation board. The ADF4108 is much simpler than the ADF4196.

  • TAGS LIST: Clock and Timing

    LTC6953
    LTC6955
    LTC6957-1
    HMC6832
    HMC7043
    LTC6950
    LTC6954
    HMC987
    AD9576
    AD9508
    HMC1035
    HMC988
    HMC1033
    HMC1034
    HMC1032
    HMC1031
    ADN4670
    ADCLK944
    ADCLK950
    ADCLK948
    ADCLK846
    ADCLK954
    ADCLK946
    ADCLK854
    AD…
  • 6/15/16: Getting the Most from ADI PLL Products

    Presenter: Ian Collins, Staff Applications Engineer

     

    This webcast is an overview of Phase Locked Loop (PLL) Technology and Applications. With over 80 unique PLLs and PLLVCOs, covering frequencies from DC to 18 GHz – ADI has the widest frequency range…

  • Replacing ADF4154 with ADF4151 to gain lock detect and fast-lock

    Hi,

    I have a current prototype design with a ADF4154, the ability to achieve quick settling (<20us) using the fast-lock feature is critical, for production I would like to add a lock detect indication and so am considering a replacement part.

    My…

  • RE: ADF4159 - Hardware and Software setup

    Hi !

    Thanks for the prompt feedback, please find attached the ADIsimPLL file (renamed as *.txt instead of *.pll) and the configuration file we use with ADF4158/9/69 PLL Software (version v4.10.6 July 2015)

  • 【在线研讨会讲义PPT下载】教你玩转锁相环(PLL)

    锁相环和压控振荡器的基本原理,了解多少?

    环路滤波器配置、相位噪声、锁定时间、杂散……,都清楚吗?

    先进的PLL操作系统了解么?

    如何优化PLL操作系统?

    ……

    针对以上问题,建议您观看ADI在线研讨会【ADI公司PLL产品系列的最新发展】http://webinar.eccn.com/details/2018041110002122.html

    此次在线研讨会的PPT请见附件,供大家学习or参考。

    Attachments: