I had a question about how to program registers 2 and 3. The data sheet say "Data is clocked into the 24-bit shift register on each rising edge of CLK."
R0 and R1 are 24 bits long. Programming those two registers seems straight forward…
Hello, I would like to know the differences between RFinA and RFinB input in the ADF4153A PLL.
I've read that RFinB must be grounded (via a bypass capacitor) when using single-ended applicaiton but I don't understand what it means.
Is it possible…
My customer has some questions about MUXOUT state of ADF4153A before register setting.
1. What is MUXOUT state of ADF4153A before register setting after power-on ? Please explain why
2. Is it possible to determine if ADF4153 is defective using the a…
My customer is using ADF4153A as the following conditions:
REF_IN: 10MHz / External_VCO: 608MHz / PFD_freq: 5MHz / CH spc.:500KHz
There is no problems in a normal state.
When the customer test the repeated power on-off, ADF4153A is occurred…
Can you advise what are the differences between ADF4153 & ADF4153A?
These parts are functional & pin to pin compatible, however the package looks a bit different.
The SW is also the same.
Are the difference performance wise?
v4.5.0 source code attached.
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Possibly a basic questions but I'm trying to determine the type of clock I can use for the Refin on an ADF4153A. The data sheets states that it is a CMOS input or AC coupled with threshold of VDD/2. if my VDD is 3V can I run this with an AC-coupled…
Following your design idea, and to keep the cost down, as im only looking for the presence of the signals and nothing more, could i use a
ADF4153A or ADF4350
and a ADL5501?