• ADF4113 convert V to dbm

    I am conused withe the descriotion in the ADF4113 datasheet. Could anyoneone clarify and give me any advice?

    In the ADF4110/ADF4111/ADF4112/ADF4113 Rev,F datasheet on page 3, the Reference Input Sensitivity is specified as 0.4/AVDD V p-p min/max for AVDD…

  • ADF4113分辨率

    ADF4113分辨率怎么计算的,小数分频都是直接给出位数,ADF4113是整数分频就没有给出,不知道怎么看的,求大神帮助,谢谢!

  • adf4113 linux iio device driver

    Hello,

    on our new design board we've mounted the PLL Synth ADF4113 .

    Unfortunately I don't find the linux IIO device driver for this chip. (I've already used adf4351 and I've found the driver on analogdevicesinc/linux · GitHub repo)

  • Inquiry about MUXOUT pin of ADF4113

    My customer  has designed MUXOUT pin of PLL IC in digital lock detection mode, as shown below because of the difference in power level.

    She was asked to comment of ADI on the design.

    She has a problem that the muxout output is rarely high on unlock…

  • adf4113 linux iio device driver

    Hello,

    on our new design board we've mounted the PLL Synth ADF4113 .

    Unfortunately I don't find the linux IIO device driver for this chip. (I've already used adf4351 and I've found the driver on analogdevicesinc/linux · GitHub repo)

  • [Help] Problem of comunication between ADF4113 and PIC12F683!

    Hi all, I have problem to comunicate between ADF4113 and PIC12F683. I use SPI comunication to transfer data. Because PIC12F683 don't have SPI hardware, i programme SPI software to comunicate by PIC C Compiler of CCS, Inc. I design the circuit likes into…

  • ADF4113的射频输入端口阻抗匹配问题

    最近在调试ADF4113过程中,在MUX中可以看到REF对应在R count中的输出,但是看不到RF在N count中的输出。

    并且N count输出是一些恒定脉冲,周期好像我测试的是400kHz,不过这个和count的参数有关。

    现在怀疑是不是射频功率阻抗匹配没做好,RF耦合不到ADF4113芯片中去。不知道ADF4113对射频输入端的阻抗匹配有没有要求?

    看ADF4113的datasheet中给出了一个S11参数的表格,但是好像datasheet后面的一些实例原理图上对这一端口的匹配也只是加了一个51欧的电阻…

  • 关于ADF4113的锁定问题

    最近在调试一个ADF4113+PSV-5N1845a的信号源板子,目前出现了这样的一些问题,在使用的过程中将鉴相频率设为200KHz,带宽设为20KHz的时候,锁住频率后相位噪声极差,如果在环路滤波处加上一个大电容后有一定的好转,但是这样加上去之后,锁定时间变得很长,而且改动环路有时候不能进行锁定,各位有没有什么好的建议来进行改进下?电源部分经测试木有问题了的。谢谢

  • schematic of pll adf4113 for 1GHz clock generator

    hi

             please help me in veifying the pll schematic .the simulation is done in adisimpll

    with regards

    durgarani

  • ADF4110 TYPICAL PERFORMANCE CHARACTERISTICS

    Hi all,

    In the datasheet @ ADF4110/ADF4111/ADF4112/ADF4113: RF PLL Frequency Synthesizers Data Sheet (Rev. F),

    Typical performance characteristics are only for ADF4113 data.

    Is ADF4110 @ 540MHz data available?

    Best regards

    sss