• ADF41020


    I want to simulate with ADIsimPLL the ADF41020 circuit to generate a 12.25 GHz signal. I set the PFD at 50 MHz but there is an error given by ADIsimPLL as you can see here.

    I really don't understand why it is not working. I think that the divider…

  • About ADF41020

    We are ready to design a optical PLL to lock the phase between two lasers. We get a beat signal which is the frequency difference between two lasers from a photodetector.We want to input this 9.2GHz beat signal  to the RFin port of ADF41020 chip.


  • the IBIS model of ADF41020

    Can you provide the IBIS model of ADF41020 for me ?

  • RE: Frequency Synthesizer design 12GHz to 20GHz

    Option 1: discrete VCO, discrete PLL, and discrete doubler.


  • RE: ADF41020 Eval Board

    can i generate less than 10GHz (3GHz, 5GHz, 6GHz..)by using ADF41020 Eval board?

  • RE: EVAL-ADF4350-EB2Z update rate

    Sorry I am confused. The board I am using is the evaluation board for ADF41020.

  • RE: ADF4002

    Hello Dr Amr,

    The current maximum speed for our PLLs is 18GHz...the ADF41020. Regards,


  • HMC733+ADF41020  目前遇到的问题


  • ADF41020 power sequencing (18 GHz PLL)

    Using multiple (12 pcs) of ADF41020 to lock ~10 GHz oscillators in a test rig, working fine until recently - when all 12 failed. Now, wondering about the reason. As it turns out, Vp (charge pump supply voltage) was absent - a voltage pre-regulator failed…

  • EVAL-ADF41020 Freequency Sweep

    My customer purchases the evaluation board EVAL-ADF41020 of the ADF41010 and checks the operation.
    Customers are using Int-N PLL software.
    The customer confirmed the output of about 11GHz - 12.8GHz.
    After that, the customer attempted to sweep the frequency…