• RE: ADF4002 parameters

    Hello Alex

            Could you help suggest for above? Thank you. 



  • ADF4002

    在使用ADISIMPLL时遇到一个问题,由于选用OCXO, Kv很小1E-7左右,设计环路滤波器时计算出来的电容值太大,请问如何解决?

  • ADF4002

    Can multiple ADF 4002 be programmed so that they are phase coherent?
    Concern that the divide by N will cause them to be on different phases. 

    Although, it seems that if the Counter Reset is held in Reset on both ADF4002 and released immediately after t…

  • ADF4002 REFIN

    Hi all,

    I designed my PLL circuit using ADF4002, I have two questions about REFIN pin of ADF4002. It is specified the specification of REFIN on datasheet as below.

    In my design, 1.8V CMOS square wave from a fanout buffer applied to REFIN of ADF4002…

  • ADF4002

    Dear Sir,

    I am measuring the phase difference between two sinusoidal signals. The phase difference between them is very small, i.e. 0.01 degrees or smaller. Can this device detect such a small phase diference? If not, is there a hardware solution for…

  • ADF4002 Using Problem


    I'm using STC52 micro processors to write numbers to ADF4002 registers.

    the code are below

    #include <reg52.h>
    #define uint unsigned int
    #define uchar unsigned char
    #define ulong unsigned long
    sbit SCLK = P0^0;
    sbit DATA = P0^1;
    sbit LE …

  • ADF4002 RF Input Sensitivity

    I'm not sure how to interpret the RF Input Sensitivity for the ADF4002 (I'm not a RF designer).

    According to the datasheet the RF Input Sensitivity is -10 - 0dBm (referred to 50ohm).

    We have a differential AC coupled driver (square wave) with…

  • ADF4002的配置

    ADF4002特性 相位检测 频率合成

    400Mhz 带宽

    104Mhz 频率相位检测


             利用ADI PLL Int-N ,选择ADF4002,根据需求得到想要的值即可。



    ADI PLL Int-N 使用说明



    然后进入Main Controls界面,输入你的频率和你要的频率即可得到寄存器的值。

    示例代码 …

  • about ADF4002 programming

    We are having a trouble with ADF4002. In some cases, we don't succeed in the programming of the chip until a while in which temperature raises a bit. the failure depends on temperature, and appears only in relatively cold conditions.

    We drive the…

  • ADF4007 + ADF4002 (controlling dividers)

    I want to implement a PLL lock with the PFD frequency >50 MHz. I'm currently using the ADF4007 and this works great, but because the RF input has a minimum divider of 8, I can only input frequencies larger than 400 MHz. I want to be able to lock RF input…