• ADF4002 Phase Detector

    Hi! I'm trying to use the ADF4002 chip strictly as a phase detector and expected the output of the CP to be linear across the range from 0-359°. Instead, the voltage output had two separate linear ranges of vastly different slopes (180° to ~…

  • ADF4002









  • ADF4002 Jitter Tolerance


    Is there a jitter tolerance spec for the ADF4002? I could not find it in the datasheet. I have a jittery clock feeding into the REFIN pin and I'm wondering if this could cause any trouble to it.


  • ADF4002 phase noise


               Customer board use ADF4002. If they breakthrough for open loop then measure VCO phase noise then compare close loop VCO and ADF4002. The phase noise of close loop looks not better than Open loop for VCO output. The test results are below.

  • RE: PFD behavior when input or reference signals disappear (ADF4002)

    Thanks for sharing! I've been fighting this exact issue, too. My RF input turns off for a brief time, and i occasionally see the CP lock up briefly (and verified that the N counter locks up for the same time). Can you elaborate, a bit for me? It sounds…

  • ADF4002 Eval Board can only lock a VCO at unique frequency, why?

    ADF4002 Eval Board can only lock a VCO (70~200MHz) to a REF (25MHz) at 75MHz/100MHz/125MHz ... , with PFD frequency 100kHz.

    In the figures below, CH1--VCO,CH2--REF,CH3--loop filter control voltage

    (1)VCO=75MHz, can lock

    (2)VCO=80MHz, can't lock…

  • RE: ADF4002 parameters

    Hello Alex

            Could you help suggest for above? Thank you. 



  • RE: ADF4371 with HMC1031/ADF4002, 20dB Phase Noise hit at 100Hz Foffset

    Were you able to compare HMC1031 vs ADF4002 with similar LBW filters? Also could you send your ADIsimPLL files for both the designs

  • ADF4002: Output frequency unstable

    Hello! I'm using the adf4002 as an int-N PLL with reference frequency = 10MHz and desired output frequency = 80MHz (The specified VCO is CVCO55CL-0060-0110). I think i have set the right value to the corresponding register. The PD polarity bit in initialization…

  • Transfer Function of ADISimPLL Design using ADF4002


    My previous question didn't make it, so I'll try again keeping it short.  I'm trying to produce the transfer function for a PLL loop generated by ADISimPLL using an ADF4002.  I managed to get close, but certain aspects of my bode plot don…