Hi,

      we are using ADCLK948 to distribute 50/60 Mhz clock to three AD9650 ADC's synchronously.When checked Signal Integrity using IBIS models, the output swing of ADCLK948 is nearly 1Volt, where 0.8V is the permissible value.I am attaching the files required…

Hi,

I want to use ADCLK948 for LVPECL operation and bias VCC to the positive supply and VEE to ground. What is my total power supply current, (IVEE+IVCC) or only IVCC in datasheet table 4?

  There are 6 Vcc pins in ACLK948. Are they connected together…

Hello,

My name is Meir and I am DFAE at Phoenix technologies.

Accubeat, one of my castomers is interested in ADCLK948 for high resolution counter application.

Clock frequency: 10MHz, rise time and a fall time is 10nsec.

For the P/N: ADCLK948, after…

Hi there

how can we estimate ADCLK948 power consumption? VCC=3.3V, VEE=GND, all outputs used.

Datasheet TAble 4 gives both VEE and VCC current. I think as our VEE=0, We may only use VCC, that is : 330mA*3.3V = 1.089W. Is this correct?

Should we Add load…

Hi, there

I have one question about ADCLK948's output. I read the datasheet that ADCLK948 can input CML signal. I want to know whether ADCLK948 can output CML signal?

Thanks in advance for your kindly help!

Br,

Wayne

We are using ADCLK948 to buffer a 50MHz clock to 3 number of ADC chips AD9650BCPZ

Our customer is observing instatbility in perfroamance of ADC for longer duration of sampling.

We are suspecting the ADC clocking scheme for this issue. Since ADCLK948 is used…

Hi there, 

We use AD9825 to drive ADCLK948, LVDS AC coupled. Two questions.

1.For the AC capacitor and 100ohm's relative location, two IC seems have conflicted(opposite) requirements. as pcitures below. AD9528 shows 100ohm between driver and caps,…

Hi there, 

some questions about ADCLK948. Input is 200MHZ LVDS, 7 LVPECL outputss.

1. We use LVDS input AC coupled to ADCL948 on CLK0 diffrential inputs according to figure21 in datasheet. How should we deal with UNUSED inputs(CLK1, VREF1, VT1) and UNUSED…

In my design I have left Q5 & Q5# un-connected. Remaining outputs are used and connected as suggested in datasheet.

I wanted to know, what is suggested by the datasheet for unused output clocks of ADCLK948?

Will leaving any of the output clock un…

Hi,

We are designing one whole heatsink to be mounted on the top of of AD9528 and ADCLK948, total about 3W. 

We may use compressible thermal pad for interfacing material placed between case TOP of IC and metal heatsink. Certain pressure should be applied…