• ADCLK907

    On page 3 of the ADCLK907 datasheet, for Vod amplitude specification,

    1) the min and max applies to what operation frequency?

    Under AC performance,

    2) Is the propagation delay min, typ, max represent possible delays for part to part variation?

        That couldn…

  • ADCLK907 Vil Vih input level

  • RE: Low frequency output voltage noise in ADCLK905 / ADCLK907 / ADCLK925 family

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: Global Clock and Ext Sysref to FPGA on the AD9208-3000EBZ board

    Hi,

    1. Not necessary. The REFCLK should be a stable frequency generator. However, we recommend that the signal generators be tied to the same (10MHz) reference so the frequency generation is accurate.

    2. on the AD9208-3000EBZ, the ADC Sample Clock is…

  • RE: Low-jitter clock mux

    Hi, Kyle,

    Maybe I am confused. It seems ADCLK907 is two-input/two-output, but I need two-input/one-output. Maybe I should wire-or those two output ports?

    BTW, can we use RF SPDT switch ADG936R for this purpose?

    Donald

  • RE: AD9528: Does PLL1 really need to be locked when PLL2 is in Locked State ?

    Hi,

    I replicated the AD9528 eval software image you provided and I have certain settings that are different than yours. I, for example, use the PLL2 charge pump current at its max current, 893.5uA. You use a lower value, 805 uA. This means a lower PLL2…

  • ADI公司解决方案通报—数模转换器IC

    ADI公司解决方案通报—数模转换器IC by adiadmin

    目录

     

    • 提供动态功率控制的DAC
    • 低功耗DAC可节省功率
    • 突破性1 ppm DAC
    • 基站发射架构中的IF DAC解决方案
    • 新款DDS IC功耗更低、尺寸更小
    • 多路输出低抖动时钟发生器
    • 数据转换知识资源
    • 低功耗精密运算放大器用作DAC缓冲器
    • 选型指南
    • RF DAC实现单封装比特流到射频转换解决方案
    • 用于无线通信设备的混合信号前端IC
    • 采用WLCSP封装的8通道denseDACRegistered . 
    • 采用紧凑型封装的多功能、易用、精密DAC…
  • 【在线研讨会回顾】高速电路设计之频率合成和时钟产生

    在设计团队不断精益的今天,工程师不仅需要深厚的技术积淀,而且必须能够跨专业设计。从模拟到数字,从硬件电路到软件,样样精通,无所不能。ADI2013在线设计峰会,旨在帮助您在一个日益复杂、压力巨大的世界里简化设计。


    查看ADI 2013在线设计峰会相关研讨会视频及资料,请点击http://ezchina.analog.com/message/9778

    研讨会上的演讲稿,请见附件

    Attachments:
  • ADI公司解决方案通报—数模转换器IC

    目录


    • 提供动态功率控制的DAC
    • 低功耗DAC可节省功率
    • 突破性1 ppm DAC
    • 基站发射架构中的IF DAC解决方案
    • 新款DDS IC功耗更低、尺寸更小
    • 多路输出低抖动时钟发生器
    • 数据转换知识资源
    • 低功耗精密运算放大器用作DAC缓冲器
    • 选型指南
    • RF DAC实现单封装比特流到射频转换解决方案
    • 用于无线通信设备的混合信号前端IC
    • 采用WLCSP封装的8通道denseDACRegistered .
    • 采用紧凑型封装的多功能、易用、精密DAC
    • 新型系…