• ADCLK846

    Hi.

    The top of p. 5 of the data sheet shows phase noise for the ADCLK846 at 2 frequencies (1GHz and 200MHz).

    I'm interested in the performance of the chip at 40MHz.

    I'm going to be using the chip for 256QAM so I need good phase noise performance…

  • ADCLK846: broadband jitter description

    Q 

    I would like to know the definition of the broadband random jitter spec? We
    have integrated random jitter spec and broadband random jitter spec in the
    datasheet. In the random jitter spec, we give the integration bandwidth. Then
    how about…

  • ADCLK846 , unused output

    Hi ~.

    I am trying to find appropriate handling guide for unused output channels of ADCLK846 especially in CMOS channel as attached schematics.. do we have guideline or don't care?

    Regards,

    Angela

  • ADF4350/1 & ADCLK846

    Hi

    I need to clock several AD9613 ADCs simultaneously, with a configurable clock.

    I've thought about using an oscillator to as input the ADF4350/1 PLL to generate the clock, then distribute it to all ADCs via the ADCLK846.

    I have some questions…

  • ADCLK846 and some AD9851

    Hello

    Actually I have some AD9851 DDS ICs in my circuit like the below:

    so I need a CMOS clock distributor to feed them simultaneously.

    the supply voltage for AD9851 is +5V bcoz in this condition the maximum output frequency can be achieved as following…

  • ADCLK846 Single Ended Clock Input

    Hi,

    I was hoping someone could help clear up my confusion on the ADCLK846.

    We are planning to input a 1.3Vpp clock and having the ADCLK846 configured in single ended operation. Is it necessary to bias the clock to go from 0 to +1.3V, or can we leave…

  • ADCLK846: TCXO as input clock

    Hi,

    can I use a 52 MHz TCXO, like the LFTCXO073006, as AC-coupled input clock for the ADCLK846?

    Moreover, I was wondering if it's possible to shut down some outputs by disconnecting the closest Vs pin.

    Thanks

    Regards

  • ADCLK846  output to output skews

    I have made a design in which ADCLK846 is used as clock distribution IC for synchronization of two AD9739 .  It seems that the output to output skew of ADCLK846  is too large to synchronize AD9739s . The output to output skew of ADCLK846 provided by datasheet…

  • ADCLK846问题 求大神 跪舔！！！！

    在使用ADCLK486中出现问题，在我输入100MHz以上和30MHz一下的时钟时，输出均正常，但是在这区间内，时钟输出入附件所示，感觉像失锁的波形，电源为1.8V，图中黄色波形为输入波形，绿色波形为输出波形，求大神看看这是什么原因啊，急！！！

  • ADCLK846 input voltage level problem in my custom ad9364 design

    Hi,

    In AD-FMCOMMS5-EBZ design, I saw that  ADCLK846's input oscilator (RXO3225M)  is not availaible to buy  in digikey and mouser. Thats why I looked for another oscilator  for ADCLK846. but I could not proper oscilator in Vpp =1.8V(input level of ADCLK846…