• About the analog input rating of ADAU1979


    I have a question about the ADAU1979 analog input terminal ratings.
    The Analog Input Voltage (Signal Pins) is specified as -0.3V to 3.6V in the "ABSOLUTE MAXIMUM RATINGS" section on page 7 of the data sheet.

    However, ADAU1979 is differentially…

  • RE: ADAU1979 Voltage Swing

    Hello makalu79,

    This was an oversight on the original datasheet. We have submitted a change request to update the table. Here is the new table:

    I think this should clear up your question.

    Dave T

  • ADAU1979 behavior under loss of MCLK

    Is anyone aware of any abnormal behavior in the ADAU1979 if MCLK is lost (but BCLK and LRCLK keep running)? 

  • ADAU1979: What starts a conversion cycle?

    We're using multiple ADAU1979 ADC's in our design.  The datasheet for this ADC is notably vague on which clocks are controlling the internal conversion.  It is understood that the LRCLK and BCLK control the output data transfer.  It is implied that…

  • Do ADAU1977 and ADAU1979 support sample by sample operation?

    Hi, we are about to buy ADZS-SC573-EZLITE kit and it has ADAU1977 and ADAU1979 ADCs on board.

    My concern is that ADAU1977 and ADAU1979 ADCs support sample by sample analog-to-digital conversion operation.

    In other words, we ask if it can operate so that…

  • How to close channel of ADAU1979


    I'm using ADAU1979 as ADC, it has 4 channels but I only needs 2 right now. 

    I have an array to store the data from ADAU1979 and the data of 4 channels are interleaved

    I want to disable other 3 channels so I all my data is come from the only one…

  • ADAU1979 How to do DC calibration


    The ADAU1979 has a register that performs DC calibration.

    Please tell me how to use this register.

    Do you have to prepare in advance?

    What state should the device be in at run time?

    Thanks and Regards,


  • ADAU1979


    请教个问题,模数转换器ADAU1979的英文手册的18页有这样的描述:During the unused slots, the output pin becomes high-Z so that the same data line can be shared with other devices on the TDM bus.     我的问题是最多支持多少个ADAU1979共享TDM Bus 的data line,是两个还是四个?谢谢。

  • ADAU1977/ADAU1978/ADAU1979 PLL and Clock settings, when sampling rate is lower than 32kHz


    Please let me ask how to configure PLL and Clock when the sampling rate is lower than 32kHz.

    For example, when sampling rate is 16kHz on the ADAU1978,
    how can we decide SAI_CTRL0.FS and PLL_CONTROL.MCS values, and MCLKIN frequency?

    Depending on the sampling…

  • ADAU1979


    Is there an 8 channel version of the ADAU1979 ? Need balanced analogue inputs, so the ADAU7118 is not applicable.