• RE: ADAU1966A initialization question

    I am using the ADAU1966A. Here are snippits of the schematic.

  • RE: ADAU196XZ documentation

    Hello Pingky,

    I apologize for the confusion. We updated the PCBs to improve the functionality but the user guide has not been updated. I am still in the process of updating the 196xA user guides and will do the 196x user guides soon. Meanwhile, the 196xA…

  • ADAU1966A Register Programming Sequence

    We are using  ADAU1966A  in system design with direct master clock mode by following clock sequences. 

       MCLK : 16 MHz

       DBCLK: 1 MHz

       DLRCLK: 31.25KHz 

       sampling rate FS : 31.25 KHz

       I2S Left Right justified

    We need help with programming the registers, for…

  • Comment on ADAU1966: If using a direct MCLK can I leave LF and PLLVDD pins disconnected?

    1.I am using ADAU1966A Audio DAC in slave mode. MASTER CLOCK is driven from FPGA, So the LF pin is unconnected. kindly suggest how to terminate the LF pin.
    2. In theory of operation of ADAU1966A, it is stated that…
  • ADAU1966A Maximum & Minimum Audio Input Sampling Rate

    Hi All,

    I'm going to use this ADAU1966A in my upcoming project for an audio application. We're having 3 different audio bandwidth in our application.

    (a) The first type will have 10KHz audio bandwidth with 31.25KHz sampling rate. 

    (b) The second…

  • Using SDP-B With ADAU1966A


    I would like to know if it is possible to use SDP-B with EVAL-ADAU1966AZ, which is the evaluation module for ADAU1966A.

    We have one board of EVAL-ADAU1966AZ, which has a compatible connector to assemble SDP-B, but we don't find the EVAL-ADAU1966AZ…

  • ADAU1966A PLL Locking Issue

    Hi Dave,

    We are using  ADAU1966A  in system design with direct master clock mode ,

    MCLK : 3 MHz (768 X Fs )

    sampling rate FS : 3.91 KHz

    DBCLK & DLRCLK are measured at the IC pin. The following values are ,

    DBCLK : 137.1389 KHz

    DLRCLK : 4.28855 KHz


  • RE: ADAU1966a StandAlone mode

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • Use of passive output filters with AD1934


    Like with the ADAU1962A and the ADAU1966A, I would like to be able to use the AD1934 with passive output filters.

    Kindly suggest the recommended circuit with component values.

    Thanks in advance!!

  • RE: TDM for 16 audio channels. What's the best way?

    Hi Dave,

    Thanks for the quick response!

    I just want to make sure I'm understanding this correctly.

    For the AD1938/AD1974 solution we'd have common LRCLK and BCLK to all four chips, then have a two pairs of data lines, data out from the codecs to the…