• [ADAU1451] The PNP transistor drive by VDRIVE pin for ADAU1451 DVDD

    Dear Sir,

    Our customer met an issue, their product(speaker) using ADAU1451 had finished development stage and MP for a while, but their end customer returned the failures set to them (2 sets in this Feb, 3 sets in May of end, total 5 failures sets) from…

  • [ADAU1451] I2S microphone configuration with AEC algorithm

    Hello all,

    I am not experienced in audio signal processing and I have never worked with SigamaStudio or any Analog Devices' DSP, therefore I am having some difficulties. 

    I am using the HiFiBerry DAC+ DSP platoform that has the ADAU1451 DSP. For my…

  • Demux ADAU1451

    We are designing a digital audio console with ADAU1451 DSP

    We need to use the Aout3 TDM 8 output  of ADAU 1451  to get four AES-3 outs. How can we demux the 8 channels to use four  DIT 4096 Texas stereo serial audio to AES converters?  
    Or do you know another…


    I am working on a linux driver to interface with a ADAU1451 that is running a program developed in sigma studio.  I have exported the header files and am able to interact with the device over spi but I find the SigmaStudioFW.h quite lacking.  The generated…

  • Loop ADAU1451


    Is it possible to create a loop in Sigma studio to execute low level bloc (multiply, add, and so on) ?

  • multirate process adau1451

    hello everyone

    can someone explain how to use the new multirate feature in SigmaStudio 3.12  and adau1451, upsampling is possible?

    My project is running at fs48k, i need some process at 192kz , for example pass through FIR filter at 192

    My next hardware…



    I have a problem when load the EQ parameters on ADAU1451.

    I build a 28 band EQ. T

    The first parameter address is: 0x002B //DM0

    The second parameter address is: 0x600E//DM1

    The third parameter address is: 0x0030

    The fourth parameter address is:…

  • ADAU1451 output port

    Dear sir,

    Our customer's project have four serial out from ADAU1451. OUT3 have independent BCLK/LRCK;

    for layout board size and EMC concern, OUT1 and OUT2 share BCLK0/LRCK0 from OUT0 (PORT1 and PORT2 BCLK/LRCLK no layout, pin in open state).

  • ADAU1451 hardware accelerator Slew



    请问下在Sigma 300里面使用硬件加速器slew,slew mode为RC type时,对应的time constant 与数据从当前值到目标值得时间有什么关系,或者说不同的time constant的值有什么用?



  • ADAU1451 SPI RAM

    Please add some more details on which SPI RAM devices are supported for this function:

    External SPI Delay [Analog Devices Wiki] 

    And also implementation hints if any :-)