If I have four channel I2S serial data input to ADAU1401 , how should I deal with the INPUT_LRCLK & INPUT_BCLK Pin ? Because I have 4 pair of LRCLK&BCLK ,but ADAU1401 only one pair of LRCLK&BCLK.
If I have four channel I2S serial data input to ADAU1401 , how should I deal with the INPUT_LRCLK & INPUT_BCLK Pin ? Because I have 4 pair of LRCLK&BCLK ,but ADAU1401 only one pair of LRCLK&BCLK.
How do I create a hex file for loading into the eeprom for self booting. Sigma Studio used to create a hex file every time you did a compile of the project, but that apparently has changed. Exporting the project files does create a hex file, but it appears…
Which seller did you buy from? A panel like this will come to me in the next few days.
Hello, how do I connect the dsp adau1401 with the computer? thank you
Hello,
I would like to use ADAU 1401 for my application.At the moment there is one question left:
Is it possible to debug ADAU1401 without an evaluationboard?
Kind regards
Sebastian
Hi,
I want to trigger a Write Back action on the ADAU1401 to save volume control and filter parameters.
Rather than try to build a voltage monitoring system that pulls the WB pin high when the voltage rail is dropping, I thought it might be possible…
The ADAU1401 is used in car infortainment project together with NXP tuner. The main problem is from the DSP Crystal frequency, as long as the crystal oscillates it will affect the FM freq at 98.3MHz. I am using 12.288MHz as MCLK. Any alternate way to…
I am currently working on a project with the adau1401. I going to be using an spdif receiver connected to an ASRC and then to the ADAU1401. The ADAU1401 will be doing some filtering and outputting i2s to a set of three DACs. I'm having an issue conceptually…
Hi,
I want to read a value using the readback function in SigmaStudio using a microcontroller connected to the I2C bus.
For testing purpose I have connected a DC value to the readback module.
When I press the READ button the module correctly shows the…
The ADAU1701 and ADAU1401 data sheets specify maximum SPI clock CCLK frequency as 6.25MHz.
The data is available on the COUT pin up to 101ns after the CCLK falling edge according to the table above, but the Figure 3 below clearly shows this delay as…