Hi jdobler,
Is there any specific/estimated date from which I would be able to purchase the ADAR1000-EVAL1Z?
In case this item is still not for sale, is there any other possible solution that allows me to connect a 32 element array? I checked in the…
I am having a problem with a phased array board equipped with ADAR1000 and ADTR1107, which will not stop oscillating unless the front-end gain is reduced by at least 15dB from the maximum. The reason for the oscillation is that the layout design of the…
When attempting to control the ADRF5019 by driving 3.3V out of the ADAR1000 TR SW POS, are multiple writes required to register 0x030 and 0x031 because the chip is looking for several repeat commands or because the initial command may not result in output…
WIth the ADAR1000 and connectors for every port (4 TX and 4 RX and 1 RFIO) do 7 ports need to be terminated in a 50 ohm load for a 2 port measurement? Or only RX ports terminated with 50 ohm if only the RX channels enabled?
Also, with my own evaluation…
Both ways would probably accomplish what you are trying to do.
1. Yes, this is true. The TR pin (when TR_SOURCE = 1) override any of the enables/disables in registers 0x2E, 2x2F and the overall enables in register 0x31 (TX_EN and RX_EN).
2. Yes this is…
The values for Reg 0x35 on Table 20 are obsolete nominal values. Please use the values shown in Table 6.
We are working to correct Table 20 in the next datasheet revision.
You can enable the ADC and the clock in the same SPI write. I would assert the start conversion bit in a subsequent SPI write after the clock and ADC are enabled.
If you look at the specifications table, the temperature has a slope of 0.8 LSB/degC. The…
Answered via email.
a. The eval boards were never cascaded in the linked video, they were in parallel. Note that this was an early demonstration. We do NOT recommend trying to build an array out of evaluation boards.
b. It is not mandatory to use the ADTR1107. The ADTR1107…
Unfortunately, what you described is the only work around I see as I think this is an error in the Silicon, although I am currently trying to confirm this with the design team.
I did confirm that there is NOT a way to readback the RAM pointer value. This…