We have experienced a string of failures with this component after replacing some of the surrounding discrete components leading to the amplifier. All typical ESD precautions aside, is anyone aware of particular sensitivities when performing hand (not…
The datasheet suggests a power sequence for the single-supply implementation. Are there any timing requirements between each event?
Hi,
I would like to use ADAQ7980.
I have two questions.
#1 What is the power supply for Reference Buffer?
#2 It is written that Gain is stable with unity gain on page 28 of datasheet.
And, Open-Loop Gain is written as 111 dB.
How much can a…
ADAQ7980和ADAQ7988
Our current design is using the ADAQ7980. We are reading the correct data over the SPI bus. However, when looking at the signals using an oscilloscope we noticed a strange RC type response on the SDO line during the assertion of the CNV signal. Can anyone…
So, I have three question.
#1 What is the total current consumption when Sampling rate is reduced to its limit?
(ADC Driver, Reference Buffer, LDO enable)
#2 What is the total current consumption when Sampling…
That project was created in ISE 14.4. Currently we are not planning to port it to Vivado. What you can do is to use the ad7980 old IP source (https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib/edk/pcores/axi_ad7980_v1_00_a) and…
Hi, Tyler
Thank you for the document. I will consider it as a reference.
I forgot the product ADAQ7980. Let me think together with the sampling rate.
I think it will be useful.
Thank you very much.
Best regards,
Yuya
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