• ADA4961 差分放大器

    ADA4961  这个芯片,我看到datasheet里面性能测试曲线都才到10MHz,我想知道到10MHz一下至1MHz该芯片线性度会不会恶化,增益会不会变小?


  • ADA4961 Parallel mode latch setup and hold time

    I've been studying the datasheet for ADA4961 and I see that there is not timing specifications defined (at least that I found) for the device when in Parallel mode. 

    What is the setup and hold time for the ADA4961 in parallel mode with respect to…

  • ADA4961 & low pass filter driving the A/D AD9625

    I have a requirement to put a 800 MHZ low pass filter in front of the AD9625. However there are no simulation files available for this as yet. So I took the example from the ADA4961 data sheet on page 18 and intend to modify it like the attachment I put…

  • 放大器 低频应用


                            ADA4961、AD8352是否 支持覆盖低频段,如100kHz~10MHz?



                           如果 ADA4961、AD8352不支持10kHz,请推荐一下运算放大器或则RF放大器芯片。

                           需求:频段0.1MHz~1GHz  功率增益15dB

  • RE: [AD-FMCADC4-EBZ][AD9680] Full scale input range way too low for AD9680

    Hi Dragos,

    Indeed, I made several measurements on a 10Mhz 1Vpp sinus wave and the read values stop saturating if I set the ADA4961 gain to 0dB.

    So I guess I mistaken the readings last time I tried to edit the ADA4961 gain.

    Thanks a lot for your help…

  • RE: VGA promotion


    You can check ADA4961 which has 3.2GHz -3dB BW, Diff Out, digital adjustable gain and HD2 typical at -81dBc and HD3 at -88dBc.

  • RE: AD9129 Interface with Amplifier

    Hi, Gonzalo,

        The AD9129 is a 14-bit High Speed DAC with a max. data rate of 2.85 GHz (5.7 GHz DAC update rate).  The ADA4961, while AC-coupled only, provides the lowest distortion over a wide analog bandwidth.  If dc-coupled output is required, then the…

  • ADA4691 gain behavior below 30MHz

    My customer is considering using the ADA4961 RF DGA, and when looking a figure 4 on datasheet, the gain seems to rise below 30MHz. Can you explain this reason for this behavior? Can it be flattened ot down to 1MHz or so, and if so, what needs to be done…

  • RE: ADA4961ACPZN Parallel Latched Mode Polarity and Timing

    Hi Rachana,

    Thanks for the reply on this one.

    Your response suggests you included a timing diagram, but I’m not seeing one in the post.

     sent me an email showing a timing diagram (from another datasheet) so I think I understand the parallel…

  • 最新ADI官方中文技术资料更新 (2015年4月)