ADA4961 这个芯片,我看到datasheet里面性能测试曲线都才到10MHz,我想知道到10MHz一下至1MHz该芯片线性度会不会恶化,增益会不会变小?
我的需求是覆盖至1MHz~600MHz,高OIP3的放大器。
ADA4961 这个芯片,我看到datasheet里面性能测试曲线都才到10MHz,我想知道到10MHz一下至1MHz该芯片线性度会不会恶化,增益会不会变小?
我的需求是覆盖至1MHz~600MHz,高OIP3的放大器。
I've been studying the datasheet for ADA4961 and I see that there is not timing specifications defined (at least that I found) for the device when in Parallel mode.
What is the setup and hold time for the ADA4961 in parallel mode with respect to…
I have a requirement to put a 800 MHZ low pass filter in front of the AD9625. However there are no simulation files available for this as yet. So I took the example from the ADA4961 data sheet on page 18 and intend to modify it like the attachment I put…
Hi Dragos,
Indeed, I made several measurements on a 10Mhz 1Vpp sinus wave and the read values stop saturating if I set the ADA4961 gain to 0dB.
So I guess I mistaken the readings last time I tried to edit the ADA4961 gain.
Thanks a lot for your help…
Hi,
You can check ADA4961 which has 3.2GHz -3dB BW, Diff Out, digital adjustable gain and HD2 typical at -81dBc and HD3 at -88dBc.
Hi, Gonzalo,
The AD9129 is a 14-bit High Speed DAC with a max. data rate of 2.85 GHz (5.7 GHz DAC update rate). The ADA4961, while AC-coupled only, provides the lowest distortion over a wide analog bandwidth. If dc-coupled output is required, then the…
My customer is considering using the ADA4961 RF DGA, and when looking a figure 4 on datasheet, the gain seems to rise below 30MHz. Can you explain this reason for this behavior? Can it be flattened ot down to 1MHz or so, and if so, what needs to be done…
Hi Rachana,
Thanks for the reply on this one.
Your response suggests you included a timing diagram, but I’m not seeing one in the post.
daniel.nauth sent me an email showing a timing diagram (from another datasheet) so I think I understand the parallel…
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