• RE: ADA4932-2的输出问题

    我试过差分放大器计算器进行仿真软件,那上面的RG一定等于RF,而且不能修改,是不是一样要求要它俩相等。。。。

  • ltc2159i+ada4932-1

    您好:我想让ada4932-1单端转差分交流耦合方式驱动ltc2159i,我中频输入信号最高频率为2mhz,信号幅度为1vpp,拟采样率设为10mhz,请问差放与adc之间的驱动电路怎么设计?另外是否还有别的更合适的差放匹配adc?

  • ltc2159i+ada4932-1

    i want to use ada4932-1(single to diff) to drive ltc2159, the ada4932-1 input signal is 2vpp,and the max freq is 2mhz,and i want to use ac couple between ada 4932-1 diff out and ltc2159 input.how can i design schematic?or  other drivers  fit for ltc2159…

  • Pluto - 2 Rx and 2 Tx using MATLAB

    Hi,

    I would like to setup the SDR Pluto to operate in 2 Tx and 2 Rx mode.

    I have followed the steps in the following video : https://www.youtube.com/watch?v=ph0Kv4SgSuI

    However, I am unsure how to setup and control the 2nd transmitter or receiver. 

  • 关于ADA4932-2的问题

    您好!

    我在使用ADA4932的过程遇到了问题,。我的电路图如附件,其中供电为+-5V pad我接-5VADIS1DIS2PD脚,有外部输入0V+5V

    测试时,我DIS脚输入为0V,此时芯片开始工作,单端转差分。我输入信号为正弦信号,无偏置,如附件示。然后我测试输出Vout+-信号如图示, 其并不是差分输出?为什么是这种结果?

    急待,您的帮助!谢谢!

  • RE: ADA4940-2, issue on creating 2 differential signals around 0V

    Hi, 

    With a bit late, thanks for this suggestion.

    By applying -0.2V to R3, this circuits can convert 0 to 0.4V to a balanced -0.2 to 0.2V .

    It has been checked on the eval board.

  • ADV7611 YCbCr 4:2:2 SDR issue

    I am trying to configure ADV7611 to output 1280x1024 video in 16-bit SDR ITU-R BT.656 4:2:2 Mode 0.

    In free-run mode with blue background I get "0xFF00, 0x0000, 0xFF00, 0x0000..." pixel data, but it is 1280 LLC-period wide DE window between HSyncs…

  • A question regarding LTM4671 parallel 2+2 mode.

    Hi ADI support team. I use LTM4671 in my new design. The datasheet of this device is here: www.analog.com/.../LTM4671.pdf I wonder whether there are two mistakes in the figure2 of datasheet? For 2+2 parallel application, I think PHMODE0 must connect to…

  • ADF4372 Fs/2 and 3Fs/2 Clock Spurious

    Hello ADI Team,

    I am using ADF4372 PLL for generating Output Clock with frequency 12.288 GHz in Doubler path (RF16).

    PLL Settings:

    Reference input frequency is 409.6 MHz.

    PFD frequency = 307.2 MHz

    VCO Frequecny = 6.144GHz

    PLL Output Observation:

    I observed…

  • RE: LTC6948-2 ,I can read from LTC6948-2,but I cant write in LTC6948-2 register.

    Hi,

    Are you using the LTC6948 eval board, FracNWizard, and DC2026 (USB to SPI board)?  Or are you trying to write to the part using your own software and hardware?  Can you send a plot of your SCLK, SDI and !CS signals, so I can look at the timing?

    To write…