• ADA4665-2失调电压问题




  • ADA4665-2


    I have a question about AD4655.

    Although there is description that the typical value of the slew rate of this device is 1V/μs, please tell me the upper and lower limits.

    I could not find it in the datasheet. 

  • ADI年度贺岁片——ADA4665-2放大器的应用

    ADI Annual New Year Film - Application of ADA4665-2 Amplifier by mengyun2801

            In the past, the digital circuit was mainly used. After changing the work, the design of the analog circuit was gradually increased. However, through the learning and understanding…

  • ADI年度贺岁片——ADA4665-2放大器的应用




  • RE: Script file of ADV7611 for 24bit SDR 4:2:2 Mode 2 output


       In general the drive strength and trace impedance must match to reduce ringing

      The ringing is caused by a mis-match in the drive strength and trace impedance.  Try lowering the drive strength for the pin output or increasing the series resistor.Note…

  • JPEG Processing - 4:2:2 v 4:2:0?

    My JPEG saga continue...

    I am using a BF561 single core to compress a 640x480 YUV 4:2:2 image into JPEG format, employing the ADI JPEG Library tools.  I am getting very poor performance compared with the reference results from the Spec Sheet.  The Spec…

  • ADV7842 4:2:2 DDR mode, ADV7393: Stanag3350 support?  (2)

    Hello Dave,

    I am facing problems with replies to your answer, so I am oppening a new dicussion with the same title.

    Please clarify your answer regarding STANAG support:

    2) As I understand it, this is the same as RS-343A/EIA-343A and none of our parts…

  • ADV7403 Register Values for RGB Input and YUV 16bit 4:2:2 output


    I have a following script for a RGB input and YUV 422 output. 

    Reg Address Reg Data
    0x52 0x00
    0x53 0x00
    0x54 0x07
    0x55 0x0C
    0x56 0x94
    0x57 0x89
    0x58 0x48
    0x59 0x08
    0x5A 0x00
    0x5B 0x68
    0x5C 0x81
    0x5D 0x00
    0x5E 0x19
  • LTC6804-2 and LTC6811-2 reference voltage 1 and 2 at 0V.


    I installed 2x LTC6811-2 and then 1x LTC6804-2 on the same board and I don't have any voltage reference output at anytime. The functional diagram in the datasheets shows that VREF1 should be always present as it's generated from V+. VREF2 is not…

  • 2*2 MIMO setup


    Iam interested in implementing a MIMO 2*2 scenario where i will use 2 fpgas (1 as the transmitter and 1 as the receiver) where each one  will be connected with one AD-FMCOMMS3-EBZ.
    So the setup will be :
    FPGA_1 + AD-FMCOMMS3-EBZ_1 =Base stati…